commit 8717679c449db5555ec0ce2873bbbe53106f4c88
author Venkatraman Govindaraju <venkatra@cs.wisc.edu> Tue Jul 30 19:53:10 2013 +0000
committer Venkatraman Govindaraju <venkatra@cs.wisc.edu> Tue Jul 30 19:53:10 2013 +0000
tree 59d2c2a001d893ed20be4f234649862435f03356
parent 264e92d6db46083f9f46484ec39e99f18d35d370

[Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
register i7 as a live-in if current function's return address is taken.

This revision fixes PR16269.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187433 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Sparc/SparcFrameLowering.cpp

diff --git a/lib/Target/Sparc/SparcFrameLowering.cpp b/lib/Target/Sparc/SparcFrameLowering.cpp
index 7e91bc3..536e466 100644
--- a/lib/Target/Sparc/SparcFrameLowering.cpp
+++ b/lib/Target/Sparc/SparcFrameLowering.cpp
@@ -188,6 +188,17 @@
     MRI.setPhysRegUnused(reg);
   }
 
+  // Rewrite MBB's Live-ins.
+  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
+       MBB != E; ++MBB) {
+    for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
+      if (!MBB->isLiveIn(reg))
+        continue;
+      MBB->removeLiveIn(reg);
+      MBB->addLiveIn(reg - SP::I0 + SP::O0);
+    }
+  }
+
   assert(verifyLeafProcRegUse(&MRI));
 #ifdef XDEBUG
   MF.verify(0, "After LeafProc Remapping");

lib/Target/Sparc/SparcISelLowering.cpp

diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index 6ddfa8c..4b0fa67 100644
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1722,20 +1722,22 @@
   return FrameAddr;
 }
 
-static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
-  MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG,
+                               const SparcTargetLowering &TLI) {
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
   MFI->setReturnAddressIsTaken(true);
 
   EVT VT = Op.getValueType();
   SDLoc dl(Op);
-  unsigned RetReg = SP::I7;
-
   uint64_t depth = Op.getConstantOperandVal(0);
 
   SDValue RetAddr;
-  if (depth == 0)
+  if (depth == 0) {
+    unsigned RetReg = MF.addLiveIn(SP::I7,
+                                   TLI.getRegClassFor(TLI.getPointerTy()));
     RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT);
-  else {
+  } else {
     // Need frame address to find return address of the caller.
     MFI->setFrameAddressIsTaken(true);
 
@@ -1793,7 +1795,7 @@
   case ISD::FNEG:
   case ISD::FABS:               return LowerF64Op(Op, DAG);
 
-  case ISD::RETURNADDR:         return LowerRETURNADDR(Op, DAG);
+  case ISD::RETURNADDR:         return LowerRETURNADDR(Op, DAG, *this);
   case ISD::FRAMEADDR:          return LowerFRAMEADDR(Op, DAG);
   case ISD::GlobalTLSAddress:
     llvm_unreachable("TLS not implemented for Sparc.");