commit 87563b39370d7adfd42b0f531409ff9bc2bfcc56
author Dale Johannesen <dalej@apple.com> Fri Jan 08 23:51:25 2010 +0000
committer Dale Johannesen <dalej@apple.com> Fri Jan 08 23:51:25 2010 +0000
tree 8aecd85a7b83bdfb6f86ea6f9d67cd992ad5febb
parent 306b4cafc1fd8c075c422825c49bdd14a5f851d7

Add DEBUG_VALUE.  Not used yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93030 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 7e6c769..714a39c 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -34,7 +34,8 @@
         R->getName() == "INSERT_SUBREG" ||
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
-        R->getName() == "COPY_TO_REGCLASS") continue;
+        R->getName() == "COPY_TO_REGCLASS" ||
+        R->getName() == "DEBUG_VALUE") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -111,7 +112,8 @@
         R->getName() == "INSERT_SUBREG" ||
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
-        R->getName() == "COPY_TO_REGCLASS") {
+        R->getName() == "COPY_TO_REGCLASS" ||
+        R->getName() == "DEBUG_VALUE") {
       o << "    0U,\n";
       continue;
     }
@@ -149,7 +151,8 @@
         InstName == "INSERT_SUBREG" ||
         InstName == "IMPLICIT_DEF" ||
         InstName == "SUBREG_TO_REG" ||
-        InstName == "COPY_TO_REGCLASS") continue;
+        InstName == "COPY_TO_REGCLASS" ||
+        InstName == "DEBUG_VALUE") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();