Update the discussion of TargetRegisterDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index fcbff1c..a62dbed 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -358,9 +358,9 @@
large.</p>
<p>Each register in the processor description has an associated
-<tt>MRegisterDesc</tt> entry, which provides a textual name for the register
-(used for assembly output and debugging dumps), a set of aliases (used to
-indicate that one register overlaps with another), and some flag bits.
+<tt>TargetRegisterDesc</tt> entry, which provides a textual name for the register
+(used for assembly output and debugging dumps) and a set of aliases (used to
+indicate that one register overlaps with another).
</p>
<p>In addition to the per-register description, the <tt>MRegisterInfo</tt> class