commit 88c7af096b09ad26cbcebfdf40151e04094b7460
author Dan Gohman <gohman@apple.com> Mon Apr 13 21:06:25 2009 +0000
committer Dan Gohman <gohman@apple.com> Mon Apr 13 21:06:25 2009 +0000
tree 3e225d87985e10c3bc45f681fb4fd7c4c6bc7db7
parent 26cbf9eb99c779b8992f4865c6cf308318d39723

Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 912617b..7b0a335 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -34,7 +34,7 @@
         R->getName() == "INSERT_SUBREG" ||
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
-        R->getName() == "COPY_TO_SUBCLASS") continue;
+        R->getName() == "COPY_TO_REGCLASS") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -111,7 +111,7 @@
         R->getName() == "INSERT_SUBREG" ||
         R->getName() == "IMPLICIT_DEF" ||
         R->getName() == "SUBREG_TO_REG" ||
-        R->getName() == "COPY_TO_SUBCLASS") {
+        R->getName() == "COPY_TO_REGCLASS") {
       o << "    0U,\n";
       continue;
     }
@@ -149,7 +149,7 @@
         InstName == "INSERT_SUBREG" ||
         InstName == "IMPLICIT_DEF" ||
         InstName == "SUBREG_TO_REG" ||
-        InstName == "COPY_TO_SUBCLASS") continue;
+        InstName == "COPY_TO_REGCLASS") continue;
 
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();