Give RegAllocSimple a TargetInstrInfo member to keep it consistent
with RegAllocLocal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53347 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index f07f7f9..ce4b420 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -46,6 +46,7 @@
MachineFunction *MF;
const TargetMachine *TM;
const TargetRegisterInfo *TRI;
+ const TargetInstrInfo *TII;
// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
// these values are spilled
@@ -144,7 +145,6 @@
// Add move instruction(s)
++NumLoads;
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
return PhysReg;
}
@@ -153,7 +153,6 @@
MachineBasicBlock::iterator I,
unsigned VirtReg, unsigned PhysReg) {
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
int FrameIdx = getStackSpaceFor(VirtReg, RC);
@@ -240,6 +239,7 @@
MF = &Fn;
TM = &MF->getTarget();
TRI = TM->getRegisterInfo();
+ TII = TM->getInstrInfo();
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();