Pass a Banner argument to the machine code verifier both from
createMachineVerifierPass and MachineFunction::verify.
The banner is printed before the machine code dump, just like the printer pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122113 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index 8dbb568..12a1cfc 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -329,7 +329,7 @@
.splitAroundLoop(Loop->getLoop());
if (VerifyEnabled)
- MF->verify(this);
+ MF->verify(this, "After splitting live range around loop");
// We have new split regs, don't assign anything.
return 0;
@@ -404,7 +404,7 @@
MF = &mf;
if (VerifyEnabled)
- MF->verify(this);
+ MF->verify(this, "Before greedy register allocator");
RegAllocBase::init(getAnalysis<VirtRegMap>(), getAnalysis<LiveIntervals>());
DomTree = &getAnalysis<MachineDominatorTree>();