commit 8a4fbe4291c01d309449f101fb77fdf90a300f97
author Anton Korobeynikov <asl@math.spbu.ru> Mon Mar 30 15:27:03 2009 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Mon Mar 30 15:27:03 2009 +0000
tree 2224a5df0b8360a3e760534e605d36f8b588ecf2
parent b8a6841f067f3e7b250653ae86781062c64a03a6

Add data.rel stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68031 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86TargetAsmInfo.cpp

diff --git a/lib/Target/X86/X86TargetAsmInfo.cpp b/lib/Target/X86/X86TargetAsmInfo.cpp
index f1d97a3..641719a 100644
--- a/lib/Target/X86/X86TargetAsmInfo.cpp
+++ b/lib/Target/X86/X86TargetAsmInfo.cpp
@@ -305,17 +305,12 @@
   switch (kind) {
    case SectionKind::Text:
     return ".text$linkonce" + GV->getName();
-   case SectionKind::Data:
-   case SectionKind::BSS:
-   case SectionKind::ThreadData:
-   case SectionKind::ThreadBSS:
-    return ".data$linkonce" + GV->getName();
    case SectionKind::ROData:
    case SectionKind::RODataMergeConst:
    case SectionKind::RODataMergeStr:
     return ".rdata$linkonce" + GV->getName();
    default:
-    assert(0 && "Unknown section kind");
+    return ".data$linkonce" + GV->getName();
   }
   return NULL;
 }