Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70309 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index cbbd2ce..dd0a8ad 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -1000,18 +1000,6 @@
}
}
-/// getMatchingSuperReg - Return a super-register of the specified register
-/// Reg so its sub-register of index SubIdx is Reg.
-static unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
- const TargetRegisterClass *RC,
- const TargetRegisterInfo* TRI) {
- for (const unsigned *SRs = TRI->getSuperRegisters(Reg);
- unsigned SR = *SRs; ++SRs)
- if (Reg == TRI->getSubReg(SR, SubIdx) && RC->contains(SR))
- return SR;
- return 0;
-}
-
/// isWinToJoinCrossClass - Return true if it's profitable to coalesce
/// two virtual registers from different register classes.
bool
@@ -1064,7 +1052,7 @@
TargetRegisterInfo::isPhysicalRegister(SrcReg)
? tri_->getPhysicalRegisterRegClass(SrcReg)
: mri_->getRegClass(SrcReg);
- if (!getMatchingSuperReg(PhysReg, SubIdx, RC, tri_))
+ if (!tri_->getMatchingSuperReg(PhysReg, SubIdx, RC))
return true;
}
}
@@ -1080,7 +1068,7 @@
TargetRegisterInfo::isPhysicalRegister(DstReg)
? tri_->getPhysicalRegisterRegClass(DstReg)
: mri_->getRegClass(DstReg);
- if (!getMatchingSuperReg(PhysReg, SubIdx, RC, tri_))
+ if (!tri_->getMatchingSuperReg(PhysReg, SubIdx, RC))
return true;
}
}
@@ -1097,7 +1085,7 @@
unsigned SrcReg, unsigned SubIdx,
unsigned &RealDstReg) {
const TargetRegisterClass *RC = mri_->getRegClass(SrcReg);
- RealDstReg = getMatchingSuperReg(DstReg, SubIdx, RC, tri_);
+ RealDstReg = tri_->getMatchingSuperReg(DstReg, SubIdx, RC);
assert(RealDstReg && "Invalid extract_subreg instruction!");
// For this type of EXTRACT_SUBREG, conservatively
@@ -1127,7 +1115,7 @@
unsigned SrcReg, unsigned SubIdx,
unsigned &RealSrcReg) {
const TargetRegisterClass *RC = mri_->getRegClass(DstReg);
- RealSrcReg = getMatchingSuperReg(SrcReg, SubIdx, RC, tri_);
+ RealSrcReg = tri_->getMatchingSuperReg(SrcReg, SubIdx, RC);
assert(RealSrcReg && "Invalid extract_subreg instruction!");
LiveInterval &RHS = li_->getInterval(DstReg);