Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index e220b08..50c856e 100644
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -275,7 +275,7 @@
break;
}
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_GlobalAddress: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
@@ -319,11 +319,11 @@
}
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
- << '_' << MO.getConstantPoolIndex();
+ << '_' << MO.getIndex();
break;
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << '_' << MO.getJumpTableIndex();
+ << '_' << MO.getIndex();
break;
default:
O << "<unknown operand type>"; abort (); break;
@@ -655,7 +655,7 @@
<< '_' << ID << ":\n";
} else {
assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
- unsigned CPI = MI->getOperand(OpNo).getConstantPoolIndex();
+ unsigned CPI = MI->getOperand(OpNo).getIndex();
const MachineConstantPoolEntry &MCPE = // Chasing pointers is fun?
MI->getParent()->getParent()->getConstantPool()->getConstants()[CPI];
@@ -675,7 +675,7 @@
void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
const MachineOperand &MO1 = MI->getOperand(OpNo);
const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
- unsigned JTI = MO1.getJumpTableIndex();
+ unsigned JTI = MO1.getIndex();
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << JTI << '_' << MO2.getImm() << ":\n";
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 479152b..b856715 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -143,11 +143,11 @@
} else if (MO.isExternalSymbol()) {
emitExternalSymbolAddress(MO.getSymbolName(), ARM::reloc_arm_relative);
} else if (MO.isConstantPoolIndex()) {
- emitConstPoolAddress(MO.getConstantPoolIndex(), ARM::reloc_arm_relative);
+ emitConstPoolAddress(MO.getIndex(), ARM::reloc_arm_relative);
} else if (MO.isJumpTableIndex()) {
- emitJumpTableAddress(MO.getJumpTableIndex(), ARM::reloc_arm_relative);
+ emitJumpTableAddress(MO.getIndex(), ARM::reloc_arm_relative);
} else if (MO.isMachineBasicBlock()) {
- emitMachineBasicBlock(MO.getMachineBasicBlock());
+ emitMachineBasicBlock(MO.getMBB());
}
return rv;
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index 2dc5bff..cbf6ed2 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -467,7 +467,7 @@
}
// Remember that this is a user of a CP entry.
- unsigned CPI = I->getOperand(op).getConstantPoolIndex();
+ unsigned CPI = I->getOperand(op).getIndex();
MachineInstr *CPEMI = CPEMIs[CPI];
unsigned MaxOffs = ((1 << Bits)-1) * Scale;
CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
@@ -802,7 +802,7 @@
}
// No. Look for previously created clones of the CPE that are in range.
- unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
+ unsigned CPI = CPEMI->getOperand(1).getIndex();
std::vector<CPEntry> &CPEs = CPEntries[CPI];
for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
// We already tried this one
@@ -818,7 +818,7 @@
// Change the CPI in the instruction operand to refer to the clone.
for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
if (UserMI->getOperand(j).isConstantPoolIndex()) {
- UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI);
+ UserMI->getOperand(j).setIndex(CPEs[i].CPI);
break;
}
// Adjust the refcount of the clone...
@@ -998,7 +998,7 @@
CPUser &U = CPUsers[CPUserIndex];
MachineInstr *UserMI = U.MI;
MachineInstr *CPEMI = U.CPEMI;
- unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
+ unsigned CPI = CPEMI->getOperand(1).getIndex();
unsigned Size = CPEMI->getOperand(2).getImm();
MachineBasicBlock *NewMBB;
// Compute this only once, it's expensive. The 4 or 8 is the value the
@@ -1057,8 +1057,8 @@
// Finally, change the CPI in the instruction operand to be ID.
for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
- if (UserMI->getOperand(i).isConstantPoolIndex()) {
- UserMI->getOperand(i).setConstantPoolIndex(ID);
+ if (UserMI->getOperand(i).isCPI()) {
+ UserMI->getOperand(i).setIndex(ID);
break;
}
@@ -1139,7 +1139,7 @@
/// away to fit in its displacement field.
bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
MachineInstr *MI = Br.MI;
- MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
+ MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
// Check to see if the DestBB is already in-range.
if (BBIsInRange(MI, DestBB, Br.MaxDisp))
@@ -1179,7 +1179,7 @@
bool
ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
MachineInstr *MI = Br.MI;
- MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
+ MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
// Add a unconditional branch to the destination and invert the branch
// condition to jump over it:
@@ -1210,11 +1210,11 @@
// =>
// bne L2
// b L1
- MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock();
+ MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
- BMI->getOperand(0).setMachineBasicBlock(DestBB);
- MI->getOperand(0).setMachineBasicBlock(NewDest);
+ BMI->getOperand(0).setMBB(DestBB);
+ MI->getOperand(0).setMBB(NewDest);
MI->getOperand(1).setImm(CC);
return true;
}
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 7e08bbc..da72193 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -71,7 +71,7 @@
MI->getOperand(3).isImmediate() &&
MI->getOperand(2).getReg() == 0 &&
MI->getOperand(3).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -80,7 +80,7 @@
if (MI->getOperand(1).isFrameIndex() &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(2).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -88,7 +88,7 @@
if (MI->getOperand(1).isFrameIndex() &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(2).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -105,7 +105,7 @@
MI->getOperand(3).isImmediate() &&
MI->getOperand(2).getReg() == 0 &&
MI->getOperand(3).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -114,7 +114,7 @@
if (MI->getOperand(1).isFrameIndex() &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(2).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -122,7 +122,7 @@
if (MI->getOperand(1).isFrameIndex() &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(2).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -319,12 +319,12 @@
unsigned LastOpc = LastInst->getOpcode();
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
if (LastOpc == ARM::B || LastOpc == ARM::tB) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
}
if (LastOpc == ARM::Bcc || LastOpc == ARM::tBcc) {
// Block ends with fall-through condbranch.
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
Cond.push_back(LastInst->getOperand(1));
Cond.push_back(LastInst->getOperand(2));
return false;
@@ -343,10 +343,10 @@
unsigned SecondLastOpc = SecondLastInst->getOpcode();
if ((SecondLastOpc == ARM::Bcc && LastOpc == ARM::B) ||
(SecondLastOpc == ARM::tBcc && LastOpc == ARM::tB)) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
Cond.push_back(SecondLastInst->getOperand(1));
Cond.push_back(SecondLastInst->getOperand(2));
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -354,7 +354,7 @@
// one is not executed, so remove it.
if ((SecondLastOpc == ARM::B || SecondLastOpc==ARM::tB) &&
(LastOpc == ARM::B || LastOpc == ARM::tB)) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
@@ -576,7 +576,7 @@
unsigned NumOps = TID->numOperands;
MachineOperand JTOP =
MI->getOperand(NumOps - ((TID->Flags & M_PREDICABLE) ? 3 : 2));
- unsigned JTI = JTOP.getJumpTableIndex();
+ unsigned JTI = JTOP.getIndex();
MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
assert(JTI < JT.size());
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index afab3d9..979410a 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -148,7 +148,7 @@
else if (MO.isImmediate())
MIB = MIB.addImm(MO.getImm());
else if (MO.isFrameIndex())
- MIB = MIB.addFrameIndex(MO.getFrameIndex());
+ MIB = MIB.addFrameIndex(MO.getIndex());
else
assert(0 && "Unknown operand for ARMInstrAddOperand!");
@@ -870,7 +870,7 @@
}
unsigned FrameReg = ARM::SP;
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
MF.getFrameInfo()->getStackSize() + SPAdj;
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index f0b124d..5d825bc 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -100,12 +100,12 @@
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
+ << MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
@@ -122,7 +122,7 @@
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << '_' << MO.getJumpTableIndex();
+ << '_' << MO.getIndex();
return;
default:
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp
index 6d68fa9..155c863 100644
--- a/lib/Target/Alpha/AlphaCodeEmitter.cpp
+++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp
@@ -202,13 +202,11 @@
Reloc, MO.getSymbolName(),
Offset, true));
else
- MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
- Reloc, MO.getConstantPoolIndex(),
- Offset));
+ MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
+ Reloc, MO.getIndex(), Offset));
} else if (MO.isMachineBasicBlock()) {
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
- Alpha::reloc_bsr,
- MO.getMachineBasicBlock()));
+ Alpha::reloc_bsr, MO.getMBB()));
}else {
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp
index c2eac6c..aa7d10a 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.cpp
+++ b/lib/Target/Alpha/AlphaInstrInfo.cpp
@@ -58,7 +58,7 @@
case Alpha::LDS:
case Alpha::LDT:
if (MI->getOperand(1).isFrameIndex()) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -76,7 +76,7 @@
case Alpha::STS:
case Alpha::STT:
if (MI->getOperand(1).isFrameIndex()) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -168,12 +168,12 @@
// If there is only one terminator instruction, process it.
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
if (LastInst->getOpcode() == Alpha::BR) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
} else if (LastInst->getOpcode() == Alpha::COND_BRANCH_I ||
LastInst->getOpcode() == Alpha::COND_BRANCH_F) {
// Block ends with fall-through condbranch.
- TBB = LastInst->getOperand(2).getMachineBasicBlock();
+ TBB = LastInst->getOperand(2).getMBB();
Cond.push_back(LastInst->getOperand(0));
Cond.push_back(LastInst->getOperand(1));
return false;
@@ -194,10 +194,10 @@
if ((SecondLastInst->getOpcode() == Alpha::COND_BRANCH_I ||
SecondLastInst->getOpcode() == Alpha::COND_BRANCH_F) &&
LastInst->getOpcode() == Alpha::BR) {
- TBB = SecondLastInst->getOperand(2).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(2).getMBB();
Cond.push_back(SecondLastInst->getOperand(0));
Cond.push_back(SecondLastInst->getOperand(1));
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -205,7 +205,7 @@
// executed, so remove it.
if (SecondLastInst->getOpcode() == Alpha::BR &&
LastInst->getOpcode() == Alpha::BR) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index bb25981..490d1ad 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -329,7 +329,7 @@
assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
// Add the base register of R30 (SP) or R15 (FP).
MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false);
diff --git a/lib/Target/CellSPU/SPUAsmPrinter.cpp b/lib/Target/CellSPU/SPUAsmPrinter.cpp
index 257d623..224616e 100644
--- a/lib/Target/CellSPU/SPUAsmPrinter.cpp
+++ b/lib/Target/CellSPU/SPUAsmPrinter.cpp
@@ -304,16 +304,16 @@
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << '_' << MO.getJumpTableIndex();
+ << '_' << MO.getIndex();
// FIXME: PIC relocation model
return;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
- << '_' << MO.getConstantPoolIndex();
+ << '_' << MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
// Computing the address of an external symbol, not calling it.
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 0906bea..1b321b6 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -139,7 +139,7 @@
case SPU::LQXr16:
if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() &&
MI->getOperand(2).isFrameIndex()) {
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -173,7 +173,7 @@
// case SPU::STQXr8:
if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() &&
MI->getOperand(2).isFrameIndex()) {
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
break;
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index f344da2..9f8dbee 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -267,7 +267,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
}
@@ -353,7 +353,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
}
@@ -598,7 +598,7 @@
}
MachineOperand &SPOp = MI.getOperand(i);
- int FrameIndex = SPOp.getFrameIndex();
+ int FrameIndex = SPOp.getIndex();
// Now add the frame object offset to the offset from r1.
int Offset = MFI->getObjectOffset(FrameIndex);
diff --git a/lib/Target/IA64/IA64AsmPrinter.cpp b/lib/Target/IA64/IA64AsmPrinter.cpp
index d59cec1..a018c49 100644
--- a/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -175,12 +175,11 @@
O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_ConstantPoolIndex: {
O << "@gprel(" << TAI->getPrivateGlobalPrefix()
- << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex() << ")";
+ << "CPI" << getFunctionNumber() << "_" << MO.getIndex() << ")";
return;
}
diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp
index 333711b..e00625c 100644
--- a/lib/Target/IA64/IA64RegisterInfo.cpp
+++ b/lib/Target/IA64/IA64RegisterInfo.cpp
@@ -86,7 +86,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
MIB.addReg(SrcReg, false, false, isKill);
NewMIs.push_back(MIB);
@@ -138,7 +138,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
return;
@@ -262,7 +262,7 @@
assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
// choose a base register: ( hasFP? framepointer : stack pointer )
unsigned BaseRegister = FP ? IA64::r5 : IA64::r12;
diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp
index e15f04e..bd5d2b7 100644
--- a/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -380,7 +380,7 @@
break;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_GlobalAddress:
@@ -393,13 +393,13 @@
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << '_' << MO.getJumpTableIndex();
+ << '_' << MO.getIndex();
break;
// FIXME: Verify correct
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI"
- << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
+ << getFunctionNumber() << "_" << MO.getIndex();
break;
default:
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index bb8a5c6..1afa216 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -74,7 +74,7 @@
(MI->getOperand(1).isImmediate()) && // the imm is zero
(isZeroImm(MI->getOperand(1))))
{
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
}
@@ -95,7 +95,7 @@
(MI->getOperand(1).isImmediate()) && // the imm is zero
(isZeroImm(MI->getOperand(1))))
{
- FrameIndex = MI->getOperand(0).getFrameIndex();
+ FrameIndex = MI->getOperand(0).getIndex();
return MI->getOperand(2).getReg();
}
}
@@ -180,7 +180,7 @@
// Unconditional branch
if (LastOpc == Mips::J) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -193,7 +193,7 @@
if (LastOpc != Mips::COND_INVALID) {
int LastNumOp = LastInst->getNumOperands();
- TBB = LastInst->getOperand(LastNumOp-1).getMachineBasicBlock();
+ TBB = LastInst->getOperand(LastNumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
for (int i=0; i<LastNumOp-1; i++) {
@@ -218,21 +218,21 @@
if (SecondLastOpc != Mips::COND_INVALID && LastOpc == Mips::J) {
int SecondNumOp = SecondLastInst->getNumOperands();
- TBB = SecondLastInst->getOperand(SecondNumOp-1).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(SecondNumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
for (int i=0; i<SecondNumOp-1; i++) {
Cond.push_back(SecondLastInst->getOperand(i));
}
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
// If the block ends with two unconditional branches, handle it. The last
// one is not executed, so remove it.
if ((SecondLastOpc == Mips::J) && (LastOpc == Mips::J)) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index c04b4c7..d526699 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -111,7 +111,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
return;
@@ -142,7 +142,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
return;
@@ -339,7 +339,7 @@
"Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
int stackSize = MF.getFrameInfo()->getStackSize();
int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 614a470..f4b689a 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -360,16 +360,16 @@
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex:
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << '_' << MO.getJumpTableIndex();
+ << '_' << MO.getIndex();
// FIXME: PIC relocation model
return;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
- << '_' << MO.getConstantPoolIndex();
+ << '_' << MO.getIndex();
return;
case MachineOperand::MO_ExternalSymbol:
// Computing the address of an external symbol, not calling it.
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 867a2ce..b4b67a2 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -136,7 +136,7 @@
// Determine the offset from the current branch to the destination
// block.
- MachineBasicBlock *Dest = I->getOperand(2).getMachineBasicBlock();
+ MachineBasicBlock *Dest = I->getOperand(2).getMBB();
int BranchSize;
if (Dest->getNumber() <= MBB.getNumber()) {
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 8bd9273..798eb9f 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -195,11 +195,11 @@
Reloc, MO.getSymbolName(), 0);
} else if (MO.isConstantPoolIndex()) {
R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
- Reloc, MO.getConstantPoolIndex(), 0);
+ Reloc, MO.getIndex(), 0);
} else {
assert(MO.isJumpTableIndex());
R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
- Reloc, MO.getJumpTableIndex(), 0);
+ Reloc, MO.getIndex(), 0);
}
// If in PIC mode, we need to encode the negated address of the
@@ -223,8 +223,7 @@
else // BCC instruction
Reloc = PPC::reloc_pcrel_bcx;
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
- Reloc,
- MO.getMachineBasicBlock()));
+ Reloc, MO.getMBB()));
} else {
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 4bac10d..6652ea4 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -99,9 +99,9 @@
case PPC::LWZ:
case PPC::LFS:
case PPC::LFD:
- if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() &&
- MI->getOperand(2).isFrameIndex()) {
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() &&
+ MI->getOperand(2).isFI()) {
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -117,9 +117,9 @@
case PPC::STW:
case PPC::STFS:
case PPC::STFD:
- if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() &&
- MI->getOperand(2).isFrameIndex()) {
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() &&
+ MI->getOperand(2).isFI()) {
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -184,11 +184,11 @@
// If there is only one terminator instruction, process it.
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
if (LastInst->getOpcode() == PPC::B) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
} else if (LastInst->getOpcode() == PPC::BCC) {
// Block ends with fall-through condbranch.
- TBB = LastInst->getOperand(2).getMachineBasicBlock();
+ TBB = LastInst->getOperand(2).getMBB();
Cond.push_back(LastInst->getOperand(0));
Cond.push_back(LastInst->getOperand(1));
return false;
@@ -208,10 +208,10 @@
// If the block ends with PPC::B and PPC:BCC, handle it.
if (SecondLastInst->getOpcode() == PPC::BCC &&
LastInst->getOpcode() == PPC::B) {
- TBB = SecondLastInst->getOperand(2).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(2).getMBB();
Cond.push_back(SecondLastInst->getOperand(0));
Cond.push_back(SecondLastInst->getOperand(1));
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -219,7 +219,7 @@
// executed, so remove it.
if (SecondLastInst->getOpcode() == PPC::B &&
LastInst->getOpcode() == PPC::B) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 2a0bdc6..84ff7ed 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -187,8 +187,7 @@
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const {
if (Addr[0].isFrameIndex()) {
- StoreRegToStackSlot(TII, SrcReg, isKill, Addr[0].getFrameIndex(), RC,
- NewMIs);
+ StoreRegToStackSlot(TII, SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs);
return;
}
@@ -216,7 +215,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
return;
@@ -295,9 +294,9 @@
void PPCRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
- SmallVectorImpl<MachineInstr*> &NewMIs) const {
+ SmallVectorImpl<MachineInstr*> &NewMIs) const{
if (Addr[0].isFrameIndex()) {
- LoadRegFromStackSlot(TII, DestReg, Addr[0].getFrameIndex(), RC, NewMIs);
+ LoadRegFromStackSlot(TII, DestReg, Addr[0].getIndex(), RC, NewMIs);
return;
}
@@ -326,7 +325,7 @@
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
else
- MIB.addFrameIndex(MO.getFrameIndex());
+ MIB.addFrameIndex(MO.getIndex());
}
NewMIs.push_back(MIB);
return;
@@ -766,7 +765,7 @@
OffsetOperandNo = FIOperandNo-1;
// Get the frame index.
- int FrameIndex = MI.getOperand(FIOperandNo).getFrameIndex();
+ int FrameIndex = MI.getOperand(FIOperandNo).getIndex();
// Get the frame pointer save index. Users of this index are primarily
// DYNALLOC instructions.
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 0753b74..22df096 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -155,7 +155,7 @@
O << (int)MO.getImm();
break;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_GlobalAddress:
O << Mang->getValueName(MO.getGlobal());
@@ -165,7 +165,7 @@
break;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
+ << MO.getIndex();
break;
default:
O << "<unknown operand type>"; abort (); break;
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index 2672389..86af68d 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -72,7 +72,7 @@
MI->getOpcode() == SP::LDDFri) {
if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
MI->getOperand(2).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
}
@@ -91,7 +91,7 @@
MI->getOpcode() == SP::STDFri) {
if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
MI->getOperand(1).getImm() == 0) {
- FrameIndex = MI->getOperand(0).getFrameIndex();
+ FrameIndex = MI->getOperand(0).getIndex();
return MI->getOperand(2).getReg();
}
}
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index aaf6fa5..7416ebb 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -69,8 +69,10 @@
MIB.addReg(MO.getReg());
else if (MO.isImmediate())
MIB.addImm(MO.getImm());
- else
- MIB.addFrameIndex(MO.getFrameIndex());
+ else {
+ assert(MO.isFI());
+ MIB.addFrameIndex(MO.getIndex());
+ }
}
MIB.addReg(SrcReg, false, false, isKill);
NewMIs.push_back(MIB);
@@ -107,12 +109,14 @@
MachineInstrBuilder MIB = BuildMI(TII.get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
- if (MO.isRegister())
+ if (MO.isReg())
MIB.addReg(MO.getReg());
- else if (MO.isImmediate())
+ else if (MO.isImm())
MIB.addImm(MO.getImm());
- else
- MIB.addFrameIndex(MO.getFrameIndex());
+ else {
+ assert(MO.isFI());
+ MIB.addFrameIndex(MO.getIndex());
+ }
}
NewMIs.push_back(MIB);
return;
@@ -241,7 +245,7 @@
assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
// Addressable stack objects are accessed using neg. offsets from %fp
MachineFunction &MF = *MI.getParent()->getParent();
diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index 0ee8916..9849c75 100644
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -62,14 +62,14 @@
for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister()) {
+ if (MO.isReg()) {
MO.setReg(Pred[j].getReg());
MadeChange = true;
- } else if (MO.isImmediate()) {
+ } else if (MO.isImm()) {
MO.setImm(Pred[j].getImm());
MadeChange = true;
- } else if (MO.isMachineBasicBlock()) {
- MO.setMachineBasicBlock(Pred[j].getMachineBasicBlock());
+ } else if (MO.isMBB()) {
+ MO.setMBB(Pred[j].getMBB());
MadeChange = true;
}
++j;
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index 34ff9c1..d2112b4 100644
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -232,13 +232,13 @@
O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
- << MO.getJumpTableIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
@@ -256,7 +256,7 @@
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 8654476..7e6fb2a 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -247,11 +247,11 @@
PCAdj, false, IsPIC);
} else if (RelocOp->isConstantPoolIndex()) {
// Must be in 64-bit mode.
- emitConstPoolAddress(RelocOp->getConstantPoolIndex(), X86::reloc_pcrel_word,
+ emitConstPoolAddress(RelocOp->getIndex(), X86::reloc_pcrel_word,
RelocOp->getOffset(), PCAdj, IsPIC);
} else if (RelocOp->isJumpTableIndex()) {
// Must be in 64-bit mode.
- emitJumpTableAddress(RelocOp->getJumpTableIndex(), X86::reloc_pcrel_word,
+ emitJumpTableAddress(RelocOp->getIndex(), X86::reloc_pcrel_word,
PCAdj, IsPIC);
} else {
assert(0 && "Unknown value to relocate!");
@@ -272,14 +272,14 @@
if (Is64BitMode) {
DispForReloc = &Op3;
} else {
- DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
+ DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex());
DispVal += Op3.getOffset();
}
} else if (Op3.isJumpTableIndex()) {
if (Is64BitMode) {
DispForReloc = &Op3;
} else {
- DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex());
+ DispVal += MCE.getJumpTableEntryAddress(Op3.getIndex());
}
} else {
DispVal = Op3.getImm();
@@ -601,7 +601,7 @@
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
if (MO.isMachineBasicBlock()) {
- emitPCRelativeBlockAddress(MO.getMachineBasicBlock());
+ emitPCRelativeBlockAddress(MO.getMBB());
} else if (MO.isGlobalAddress()) {
bool NeedStub = Is64BitMode ||
Opcode == X86::TAILJMPd ||
@@ -642,9 +642,9 @@
else if (MO1.isExternalSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC);
else if (MO1.isConstantPoolIndex())
- emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO1.getIndex(), rt, IsPIC);
else if (MO1.isJumpTableIndex())
- emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO1.getIndex(), rt, IsPIC);
}
}
break;
@@ -711,9 +711,9 @@
else if (MO1.isExternalSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC);
else if (MO1.isConstantPoolIndex())
- emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO1.getIndex(), rt, IsPIC);
else if (MO1.isJumpTableIndex())
- emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO1.getIndex(), rt, IsPIC);
}
}
break;
@@ -745,9 +745,9 @@
else if (MO.isExternalSymbol())
emitExternalSymbolAddress(MO.getSymbolName(), rt, IsPIC);
else if (MO.isConstantPoolIndex())
- emitConstPoolAddress(MO.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO.getIndex(), rt, IsPIC);
else if (MO.isJumpTableIndex())
- emitJumpTableAddress(MO.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO.getIndex(), rt, IsPIC);
}
}
break;
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index efb7307..4d17f55 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5838,7 +5838,7 @@
AM.Base.Reg = Op.getReg();
} else {
AM.BaseType = X86AddressMode::FrameIndexBase;
- AM.Base.FrameIndex = Op.getFrameIndex();
+ AM.Base.FrameIndex = Op.getIndex();
}
Op = MI->getOperand(1);
if (Op.isImmediate())
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 70b1264..3403f1c 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -71,12 +71,12 @@
case X86::MOVAPDrm:
case X86::MMX_MOVD64rm:
case X86::MMX_MOVQ64rm:
- if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
- MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
+ if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() &&
+ MI->getOperand(3).isReg() && MI->getOperand(4).isImm() &&
MI->getOperand(2).getImm() == 1 &&
MI->getOperand(3).getReg() == 0 &&
MI->getOperand(4).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -102,12 +102,12 @@
case X86::MMX_MOVD64mr:
case X86::MMX_MOVQ64mr:
case X86::MMX_MOVNTQmr:
- if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
- MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() &&
+ if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() &&
+ MI->getOperand(2).isReg() && MI->getOperand(3).isImm() &&
MI->getOperand(1).getImm() == 1 &&
MI->getOperand(2).getReg() == 0 &&
MI->getOperand(3).getImm() == 0) {
- FrameIndex = MI->getOperand(0).getFrameIndex();
+ FrameIndex = MI->getOperand(0).getIndex();
return MI->getOperand(4).getReg();
}
break;
@@ -689,7 +689,7 @@
// it's an unconditional, conditional, or indirect branch.
if (LastInst->getOpcode() == X86::JMP) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
}
X86::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
@@ -697,7 +697,7 @@
return true; // Can't handle indirect branch.
// Otherwise, block ends with fall-through condbranch.
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
return false;
}
@@ -713,9 +713,9 @@
// If the block ends with X86::JMP and a conditional branch, handle it.
X86::CondCode BranchCode = GetCondFromBranchOpc(SecondLastInst->getOpcode());
if (BranchCode != X86::COND_INVALID && LastInst->getOpcode() == X86::JMP) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -723,7 +723,7 @@
// executed, so remove it.
if (SecondLastInst->getOpcode() == X86::JMP &&
LastInst->getOpcode() == X86::JMP) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index 8dae321..39fc7a0 100644
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -135,20 +135,20 @@
O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << "_" << MO.getJumpTableIndex();
+ << "_" << MO.getIndex();
return;
}
case MachineOperand::MO_ConstantPoolIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
- << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
+ << getFunctionNumber() << "_" << MO.getIndex();
int Offset = MO.getOffset();
if (Offset > 0)
O << " + " << Offset;
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index e57bc03..07c2591 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -781,13 +781,13 @@
else if (MO.isImmediate())
MIB = MIB.addImm(MO.getImm());
else if (MO.isFrameIndex())
- MIB = MIB.addFrameIndex(MO.getFrameIndex());
+ MIB = MIB.addFrameIndex(MO.getIndex());
else if (MO.isGlobalAddress())
MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
else if (MO.isConstantPoolIndex())
- MIB = MIB.addConstantPoolIndex(MO.getConstantPoolIndex(), MO.getOffset());
+ MIB = MIB.addConstantPoolIndex(MO.getIndex(), MO.getOffset());
else if (MO.isJumpTableIndex())
- MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex());
+ MIB = MIB.addJumpTableIndex(MO.getIndex());
else if (MO.isExternalSymbol())
MIB = MIB.addExternalSymbol(MO.getSymbolName());
else
@@ -1611,7 +1611,7 @@
assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
// This must be part of a four operand memory reference. Replace the
// FrameIndex with base register with EBP. Add an offset to the offset.
MI.getOperand(i).ChangeToRegister(hasFP(MF) ? FramePtr : StackPtr, false);