Fold (zext (and x, cst)) -> (and (zext x), cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 52b7ed5..bec5241 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3202,6 +3202,19 @@
X, DAG.getConstant(Mask, VT));
}
+ // Fold (zext (and x, cst)) -> (and (zext x), cst)
+ if (N0.getOpcode() == ISD::AND &&
+ N0.getOperand(1).getOpcode() == ISD::Constant &&
+ N0.getOperand(0).getOpcode() != ISD::TRUNCATE &&
+ N0.getOperand(0).hasOneUse()) {
+ APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
+ Mask.zext(VT.getSizeInBits());
+ return DAG.getNode(ISD::AND, N->getDebugLoc(), VT,
+ DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(), VT,
+ N0.getOperand(0)),
+ DAG.getConstant(Mask, VT));
+ }
+
// fold (zext (load x)) -> (zext (truncate (zextload x)))
if (ISD::isNON_EXTLoad(N0.getNode()) &&
((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile()) ||
diff --git a/test/CodeGen/CellSPU/and_ops.ll b/test/CodeGen/CellSPU/and_ops.ll
index 139e97b..716de2e 100644
--- a/test/CodeGen/CellSPU/and_ops.ll
+++ b/test/CodeGen/CellSPU/and_ops.ll
@@ -1,9 +1,9 @@
; RUN: llc < %s -march=cellspu > %t1.s
-; RUN: grep and %t1.s | count 234
+; RUN: grep and %t1.s | count 230
; RUN: grep andc %t1.s | count 85
-; RUN: grep andi %t1.s | count 37
-; RUN: grep andhi %t1.s | count 30
-; RUN: grep andbi %t1.s | count 4
+; RUN: grep andi %t1.s | count 39
+; RUN: grep andhi %t1.s | count 28
+; RUN: grep andbi %t1.s | count 2
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"