Renamed files:
* PowerPCReg.td => PowerPCRegisterinfo.td
* PowerPCInstrs.td => PowerPCInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15295 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile
index 8c3949d..ba9892f 100644
--- a/lib/Target/PowerPC/Makefile
+++ b/lib/Target/PowerPC/Makefile
@@ -16,31 +16,31 @@
PowerPCGenInstrInfo.inc
PowerPCGenRegisterNames.inc:: $(SourceDir)/PowerPC.td \
- $(SourceDir)/PowerPCReg.td \
+ $(SourceDir)/PowerPCRegisterInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building PowerPC.td register names with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
PowerPCGenRegisterInfo.h.inc:: $(SourceDir)/PowerPC.td \
- $(SourceDir)/PowerPCReg.td \
+ $(SourceDir)/PowerPCRegisterInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building PowerPC.td register information header with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
PowerPCGenRegisterInfo.inc:: $(SourceDir)/PowerPC.td \
- $(SourceDir)/PowerPCReg.td \
+ $(SourceDir)/PowerPCRegisterInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building PowerPC.td register information implementation with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
PowerPCGenInstrNames.inc:: $(SourceDir)/PowerPC.td \
- $(SourceDir)/PowerPCInstrs.td \
+ $(SourceDir)/PowerPCInstrInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building PowerPC.td instruction names with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
PowerPCGenInstrInfo.inc:: $(SourceDir)/PowerPC.td \
- $(SourceDir)/PowerPCInstrs.td \
+ $(SourceDir)/PowerPCInstrInfo.td \
$(SourceDir)/../Target.td $(TBLGEN)
@echo "Building PowerPC.td instruction information with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 0a73c66..6028b8a 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1,4 +1,4 @@
-//===- PowerPCInstrInfo.td - Describe the PowerPC Instruction Set -*- C++ -*-=//
+//===- PowerPCInstrInfo.td - The PowerPC Instruction Set -----*- tablegen -*-=//
//
// The LLVM Compiler Infrastructure
//
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index 28bfa36..aa14417 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -1,4 +1,4 @@
-//===- PowerPCReg.td - Describe the PowerPC Register File -------*- C++ -*-===//
+//===- PowerPCRegisterInfo.td - The PowerPC Register File --*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
diff --git a/lib/Target/PowerPC/PowerPC.td b/lib/Target/PowerPC/PowerPC.td
index aac5455..945bce3 100644
--- a/lib/Target/PowerPC/PowerPC.td
+++ b/lib/Target/PowerPC/PowerPC.td
@@ -18,8 +18,8 @@
// Register File Description
//===----------------------------------------------------------------------===//
-include "PowerPCReg.td"
-include "PowerPCInstrs.td"
+include "PowerPCRegisterInfo.td"
+include "PowerPCInstrInfo.td"
def PowerPCInstrInfo : InstrInfo {
let PHIInst = PHI;