long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40792 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index f051da4..85ec028 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -57,7 +57,7 @@
}
AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
- : DataLayout("e"),
+ : DataLayout("e-f128:128:128"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),
Subtarget(M, FS),
diff --git a/lib/Target/IA64/IA64TargetMachine.cpp b/lib/Target/IA64/IA64TargetMachine.cpp
index 51beaa1..71f614d 100644
--- a/lib/Target/IA64/IA64TargetMachine.cpp
+++ b/lib/Target/IA64/IA64TargetMachine.cpp
@@ -63,7 +63,7 @@
/// IA64TargetMachine ctor - Create an LP64 architecture model
///
IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
- : DataLayout("e"),
+ : DataLayout("e-f80:128:128"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
TLInfo(*this) { // FIXME? check this stuff
}
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h
index d1e135c..1ad3f13 100644
--- a/lib/Target/PowerPC/PPCSubtarget.h
+++ b/lib/Target/PowerPC/PPCSubtarget.h
@@ -104,8 +104,8 @@
/// getTargetDataString - Return the pointer size and type alignment
/// properties of this subtarget.
const char *getTargetDataString() const {
- return isPPC64() ? "E-p:64:64-f64:32:64-i64:32:64"
- : "E-p:32:32-f64:32:64-i64:32:64";
+ return isPPC64() ? "E-p:64:64-f64:32:64-i64:32:64-f128:64:128"
+ : "E-p:32:32-f64:32:64-i64:32:64-f128:64:128";
}
/// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index e0206d8..167e7ec 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -30,7 +30,7 @@
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
- : DataLayout("E-p:32:32"),
+ : DataLayout("E-p:32:32-f128:128:128"),
Subtarget(M, FS), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index 301e8c1..bb1ad32 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -436,6 +436,13 @@
return 4;
case Type::DoubleTyID:
return 8;
+ case Type::PPC_FP128TyID:
+ case Type::FP128TyID:
+ return 16;
+ // In memory objects this is always aligned to a higher boundary, but
+ // only 10 bytes contain information.
+ case Type::X86_FP80TyID:
+ return 10;
case Type::VectorTyID: {
const VectorType *PTy = cast<VectorType>(Ty);
return PTy->getBitWidth() / 8;
@@ -493,6 +500,11 @@
break;
case Type::FloatTyID:
case Type::DoubleTyID:
+ // PPC_FP128TyID and FP128TyID have different data contents, but the
+ // same size and alignment, so they look the same here.
+ case Type::PPC_FP128TyID:
+ case Type::FP128TyID:
+ case Type::X86_FP80TyID:
AlignType = FLOAT_ALIGN;
break;
case Type::VectorTyID: {
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 02fbf95..35be090 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -115,8 +115,8 @@
bool is64Bit)
: Subtarget(M, FS, is64Bit),
DataLayout(Subtarget.is64Bit() ?
- std::string("e-p:64:64-f64:32:64-i64:32:64") :
- std::string("e-p:32:32-f64:32:64-i64:32:64")),
+ std::string("e-p:64:64-f64:32:64-i64:32:64-f80:128:128") :
+ std::string("e-p:32:32-f64:32:64-i64:32:64-f80:128:128")),
FrameInfo(TargetFrameInfo::StackGrowsDown,
Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
InstrInfo(*this), JITInfo(*this), TLInfo(*this) {