| commit | 92bcd96bbcf42911a76570cc0974e513bc7f261d | [log] [tgz] |
|---|---|---|
| author | Chad Rosier <mcrosier@apple.com> | Tue Jun 14 22:29:10 2011 +0000 |
| committer | Chad Rosier <mcrosier@apple.com> | Tue Jun 14 22:29:10 2011 +0000 |
| tree | f7aa5be2ae7bfc3418f06248d0efe73406e1648b | |
| parent | 1c61990b2daa77f3444eb2b6d8157cdc805ce22f [diff] |
When pattern matching during instruction selection make sure shl x,1 is not converted to add x,x if x is a undef. add undef, undef does not guarantee that the resulting low order bit is zero. Fixes <rdar://problem/9453156> and <rdar://problem/9487392>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8