Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index d44dc5d..4650ad7 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3992,7 +3992,7 @@
   // to set, the condition code register to branch on, the true/false values to
   // select between, and a branch opcode to use.
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator It = BB;
+  MachineFunction::iterator It = BB;
   ++It;
   
   //  thisMBB:
@@ -4002,14 +4002,14 @@
   //   bCC copy1MBB
   //   fallthrough --> copy0MBB
   MachineBasicBlock *thisMBB = BB;
-  MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+  MachineFunction *F = BB->getParent();
+  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
   unsigned SelectPred = MI->getOperand(4).getImm();
   BuildMI(BB, TII->get(PPC::BCC))
     .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB);
-  MachineFunction *F = BB->getParent();
-  F->getBasicBlockList().insert(It, copy0MBB);
-  F->getBasicBlockList().insert(It, sinkMBB);
+  F->insert(It, copy0MBB);
+  F->insert(It, sinkMBB);
   // Update machine-CFG edges by transferring all successors of the current
   // block to the new block which will contain the Phi node for the select.
   sinkMBB->transferSuccessors(BB);
@@ -4033,7 +4033,7 @@
     .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB)
     .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
 
-  delete MI;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
   return BB;
 }