Treat mid-block labels the same as terminators when building the
MachineInstr scheduling DAG, meaning they implicitly depend on all
preceding defs. This fixes Benchmarks/Shootout-C++/except and
Regression/C++/EH/simple_rethrow in
-relocation-model=pic -disable-post-RA-scheduler=false
mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59747 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 72008c9..b6bc44e 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -97,7 +97,7 @@
}
if (Terminator && SU->Succs.empty())
Terminator->addPred(SU, /*isCtrl=*/false, /*isSpecial=*/false);
- if (MI->getDesc().isTerminator())
+ if (MI->getDesc().isTerminator() || MI->isLabel())
Terminator = SU;
}
}