commit 8eeb97927530a1e53c3529a9b93f94239056d1b4
author Bill Wendling <isanbard@gmail.com> Tue Feb 26 21:11:01 2008 +0000
committer Bill Wendling <isanbard@gmail.com> Tue Feb 26 21:11:01 2008 +0000
tree e81fc4181583f23b090bdceca5eda53bed117880
parent 7823251bfc67e9a156eae9dc51de4aed0339557b

Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMAsmPrinter.cpp

diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index dacc50d..31055b2 100644
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -273,7 +273,7 @@
   switch (MO.getType()) {
   case MachineOperand::MO_Register:
     if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
-      O << TM.getRegisterInfo()->get(MO.getReg()).Name;
+      O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
     else
       assert(0 && "not implemented");
     break;
@@ -393,7 +393,7 @@
   const MachineOperand &MO3 = MI->getOperand(Op+2);
 
   assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
-  O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
 
   // Print the shift opc.
   O << ", "
@@ -402,7 +402,7 @@
 
   if (MO2.getReg()) {
     assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
-    O << TM.getRegisterInfo()->get(MO2.getReg()).Name;
+    O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
     assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
   } else {
     O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
@@ -419,7 +419,7 @@
     return;
   }
 
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
 
   if (!MO2.getReg()) {
     if (ARM_AM::getAM2Offset(MO3.getImm()))  // Don't print +0.
@@ -432,7 +432,7 @@
 
   O << ", "
     << (char)ARM_AM::getAM2Op(MO3.getImm())
-    << TM.getRegisterInfo()->get(MO2.getReg()).Name;
+    << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
   
   if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
     O << ", "
@@ -455,7 +455,7 @@
   }
 
   O << (char)ARM_AM::getAM2Op(MO2.getImm())
-    << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+    << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
   
   if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
     O << ", "
@@ -469,12 +469,12 @@
   const MachineOperand &MO3 = MI->getOperand(Op+2);
   
   assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
 
   if (MO2.getReg()) {
     O << ", "
       << (char)ARM_AM::getAM3Op(MO3.getImm())
-      << TM.getRegisterInfo()->get(MO2.getReg()).Name
+      << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
       << "]";
     return;
   }
@@ -492,7 +492,7 @@
 
   if (MO1.getReg()) {
     O << (char)ARM_AM::getAM3Op(MO2.getImm())
-      << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+      << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
     return;
   }
 
@@ -545,13 +545,13 @@
     return;
   } else if (Modifier && strcmp(Modifier, "base") == 0) {
     // Used for FSTM{D|S} and LSTM{D|S} operations.
-    O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+    O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
     if (ARM_AM::getAM5WBFlag(MO2.getImm()))
       O << "!";
     return;
   }
   
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
   
   if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
     O << ", #"
@@ -570,15 +570,15 @@
 
   const MachineOperand &MO1 = MI->getOperand(Op);
   assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
-  O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).Name << "]";
+  O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
 }
 
 void
 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
   const MachineOperand &MO1 = MI->getOperand(Op);
   const MachineOperand &MO2 = MI->getOperand(Op+1);
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
-  O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).Name << "]";
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
+  O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
 }
 
 void
@@ -593,9 +593,9 @@
     return;
   }
 
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
   if (MO3.getReg())
-    O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name;
+    O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
   else if (unsigned ImmOffs = MO2.getImm()) {
     O << ", #" << ImmOffs;
     if (Scale > 1)
@@ -620,7 +620,7 @@
 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
   const MachineOperand &MO1 = MI->getOperand(Op);
   const MachineOperand &MO2 = MI->getOperand(Op+1);
-  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
+  O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
   if (unsigned ImmOffs = MO2.getImm())
     O << ", #" << ImmOffs << " * 4";
   O << "]";