revert 93934, removing the MCAsmInfo endianness bit.  I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93985 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsMCAsmInfo.cpp b/lib/Target/Mips/MipsMCAsmInfo.cpp
index 9a0c0bf..60ef1c9 100644
--- a/lib/Target/Mips/MipsMCAsmInfo.cpp
+++ b/lib/Target/Mips/MipsMCAsmInfo.cpp
@@ -14,8 +14,7 @@
 #include "MipsMCAsmInfo.h"
 using namespace llvm;
 
-MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, const StringRef &TT,
-                             bool isLittleEndian) : MCAsmInfo(isLittleEndian) {
+MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, const StringRef &TT) {
   AlignmentIsInBytes          = false;
   COMMDirectiveTakesAlignment = true;
   Data16bitsDirective         = "\t.half\t";
diff --git a/lib/Target/Mips/MipsMCAsmInfo.h b/lib/Target/Mips/MipsMCAsmInfo.h
index 62ef463..33a4b5e 100644
--- a/lib/Target/Mips/MipsMCAsmInfo.h
+++ b/lib/Target/Mips/MipsMCAsmInfo.h
@@ -22,23 +22,9 @@
   
   class MipsMCAsmInfo : public MCAsmInfo {
   public:
-    explicit MipsMCAsmInfo(const Target &T, const StringRef &TT,
-                           bool isLittleEndian);
+    explicit MipsMCAsmInfo(const Target &T, const StringRef &TT);
   };
-  
-  /// Big Endian MAI.
-  class MipsBEMCAsmInfo : public MipsMCAsmInfo {
-  public:
-    MipsBEMCAsmInfo(const Target &T, const StringRef &TT)
-      : MipsMCAsmInfo(T, TT, false) {}
-  };
-  
-  /// Little Endian MAI.
-  class MipsLEMCAsmInfo : public MipsMCAsmInfo {
-  public:
-    MipsLEMCAsmInfo(const Target &T, const StringRef &TT)
-    : MipsMCAsmInfo(T, TT, true) {}
-  };
+
 } // namespace llvm
 
 #endif
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 1168fef..4724ff7 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -22,8 +22,8 @@
   // Register the target.
   RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
   RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
-  RegisterAsmInfo<MipsBEMCAsmInfo> A(TheMipsTarget);
-  RegisterAsmInfo<MipsLEMCAsmInfo> B(TheMipselTarget);
+  RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
+  RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
 }
 
 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -60,7 +60,8 @@
 // Install an instruction selector pass using 
 // the ISelDag to gen Mips code.
 bool MipsTargetMachine::
-addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
+addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) 
+{
   PM.add(createMipsISelDag(*this));
   return false;
 }