| commit | 909652f6876a97d63db20606cd1b37e95d016caf | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@gmail.com> | Fri Oct 14 03:21:46 2011 +0000 |
| committer | Craig Topper <craig.topper@gmail.com> | Fri Oct 14 03:21:46 2011 +0000 |
| tree | a0a7eb7f62431538b9fbfbadb4c6b500dbd3ef96 | |
| parent | 91d2cc9cdd5f5c5fa89b4efa75217c96cbd38356 [diff] [blame] |
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index c2f60be..7064dd0 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp
@@ -290,6 +290,7 @@ , HasRDRAND(false) , HasF16C(false) , HasLZCNT(false) + , HasBMI(false) , IsBTMemSlow(false) , IsUAMemFast(false) , HasVectorUAMem(false)