Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 25cbda5..af9c4cf 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -125,7 +125,8 @@
emitWord(getBinaryCodeForInstr(*I));
break;
case PPC::IMPLICIT_DEF_GPR:
- case PPC::IMPLICIT_DEF_FP:
+ case PPC::IMPLICIT_DEF_F8:
+ case PPC::IMPLICIT_DEF_F4:
break; // pseudo opcode, no side effects
case PPC::MovePCtoLR:
assert(0 && "CodeEmitter does not support MovePCtoLR instruction");