Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 0e233c7..16464d1 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -108,8 +108,7 @@
}
-MVT::ValueType
-MipsTargetLowering::getSetCCResultType(const SDOperand &) const {
+MVT MipsTargetLowering::getSetCCResultType(const SDOperand &) const {
return MVT::i32;
}
@@ -223,7 +222,7 @@
SDOperand HiPart;
if (!isPIC) {
- const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32);
+ const MVT *VTs = DAG.getNodeValueTypes(MVT::i32);
SDOperand Ops[] = { GA };
HiPart = DAG.getNode(MipsISD::Hi, VTs, 1, Ops, 1);
} else // Emit Load from Global Pointer
@@ -256,7 +255,7 @@
SDOperand False = Op.getOperand(3);
SDOperand CC = Op.getOperand(4);
- const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32);
+ const MVT *VTs = DAG.getNodeValueTypes(MVT::i32);
SDOperand Ops[] = { LHS, RHS, CC };
SDOperand SetCCRes = DAG.getNode(ISD::SETCC, VTs, 1, Ops, 3);
@@ -270,12 +269,12 @@
SDOperand ResNode;
SDOperand HiPart;
- MVT::ValueType PtrVT = Op.getValueType();
+ MVT PtrVT = Op.getValueType();
JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
SDOperand JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
if (getTargetMachine().getRelocationModel() != Reloc::PIC_) {
- const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32);
+ const MVT *VTs = DAG.getNodeValueTypes(MVT::i32);
SDOperand Ops[] = { JTI };
HiPart = DAG.getNode(MipsISD::Hi, VTs, 1, Ops, 1);
} else // Emit Load from Global Pointer
@@ -341,7 +340,7 @@
// To meet ABI, Mips must always allocate 16 bytes on
// the stack (even if less than 4 are used as arguments)
- int VTsize = MVT::getSizeInBits(MVT::i32)/8;
+ int VTsize = MVT(MVT::i32).getSizeInBits()/8;
MFI->CreateFixedObject(VTsize, (VTsize*3));
CCInfo.AnalyzeCallOperands(Op.Val, CC_Mips);
@@ -391,7 +390,7 @@
// This guarantees that when allocating Local Area the firsts
// 16 bytes which are alwayes reserved won't be overwritten.
LastStackLoc = (16 + VA.getLocMemOffset());
- int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
+ int FI = MFI->CreateFixedObject(VA.getValVT().getSizeInBits()/8,
LastStackLoc);
SDOperand PtrOff = DAG.getFrameIndex(FI,getPointerTy());
@@ -575,7 +574,7 @@
// Arguments stored on registers
if (VA.isRegLoc()) {
- MVT::ValueType RegVT = VA.getLocVT();
+ MVT RegVT = VA.getLocVT();
TargetRegisterClass *RC;
if (RegVT == MVT::i32)
@@ -738,8 +737,7 @@
}
std::pair<unsigned, const TargetRegisterClass*> MipsTargetLowering::
-getRegForInlineAsmConstraint(const std::string &Constraint,
- MVT::ValueType VT) const
+getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const
{
if (Constraint.size() == 1) {
switch (Constraint[0]) {
@@ -753,7 +751,7 @@
std::vector<unsigned> MipsTargetLowering::
getRegClassForInlineAsmConstraint(const std::string &Constraint,
- MVT::ValueType VT) const
+ MVT VT) const
{
if (Constraint.size() != 1)
return std::vector<unsigned>();