commit 92dfe2001e96f6e2b6d327e8816f38033f88b295
author Dan Gohman <gohman@apple.com> Fri Sep 14 20:33:02 2007 +0000
committer Dan Gohman <gohman@apple.com> Fri Sep 14 20:33:02 2007 +0000
tree 14670779a18a50be87d7bbd426a595a04ca6ed77
parent 693f541526cdd5f084adc5b8a5a5b290401a0b8e

Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/VirtRegMap.cpp

diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 307a8e2..8a1432e 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -446,7 +446,7 @@
                             SmallVector<unsigned, 1> *KillRegs = NULL) {
   for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI.getOperand(i);
-    if (!MO.isReg() || !MO.isUse() || !MO.isKill())
+    if (!MO.isRegister() || !MO.isUse() || !MO.isKill())
       continue;
     unsigned Reg = MO.getReg();
     if (KillRegs)
@@ -471,7 +471,7 @@
   MachineOperand *DefOp = NULL;
   for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = DefMI->getOperand(i);
-    if (MO.isReg() && MO.isDef()) {
+    if (MO.isRegister() && MO.isDef()) {
       if (MO.getReg() == Reg)
         DefOp = &MO;
       else if (!MO.isDead())
@@ -488,7 +488,7 @@
     MachineInstr *NMI = I;
     for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
       MachineOperand &MO = NMI->getOperand(j);
-      if (!MO.isReg() || MO.getReg() != Reg)
+      if (!MO.isRegister() || MO.getReg() != Reg)
         continue;
       if (MO.isUse())
         FoundUse = true;
@@ -511,7 +511,7 @@
   const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
   for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI.getOperand(i);
-    if (!MO.isReg() || !MO.isUse())
+    if (!MO.isRegister() || !MO.isUse())
       continue;
     unsigned Reg = MO.getReg();
     if (Reg == 0)
@@ -535,7 +535,7 @@
 
   for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI.getOperand(i);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isRegister() || !MO.isDef())
       continue;
     unsigned Reg = MO.getReg();
     RegKills.reset(Reg);
@@ -826,7 +826,7 @@
         bool CanReuse = true;
         int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
         if (ti != -1 &&
-            MI.getOperand(ti).isReg() && 
+            MI.getOperand(ti).isRegister() && 
             MI.getOperand(ti).getReg() == VirtReg) {
           // Okay, we have a two address operand.  We can reuse this physreg as
           // long as we are allowed to clobber the value and there isn't an