commit 930e4d96e8718abcb56212676c35e6f7ea0ab605
author Richard Pennington <rich@pennware.com> Tue Sep 08 12:47:30 2009 +0000
committer Richard Pennington <rich@pennware.com> Tue Sep 08 12:47:30 2009 +0000
tree 0cd37e192575757adc053e2ca1abfc050e638d61
parent 22f35ace4599f28f50159cf0e19436e755669340

Add source debug information to the Sparc code generator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81215 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp

diff --git a/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp b/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
index b94b718..e608f7e 100644
--- a/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
@@ -104,6 +104,8 @@
 
   O << "\t.type\t" << CurrentFnName << ", #function\n";
   O << CurrentFnName << ":\n";
+  // Emit pre-function debug information.
+  DW->BeginFunction(&MF);
 
   // Number each basic block so that we can consistently refer to them
   // in PC-relative references.
@@ -130,6 +132,9 @@
     }
   }
 
+  // Emit post-function debug information.
+  DW->EndFunction(&MF);
+
   // We didn't modify anything.
   return false;
 }

lib/Target/Sparc/SparcMCAsmInfo.cpp

diff --git a/lib/Target/Sparc/SparcMCAsmInfo.cpp b/lib/Target/Sparc/SparcMCAsmInfo.cpp
index c45d124..b67537c 100644
--- a/lib/Target/Sparc/SparcMCAsmInfo.cpp
+++ b/lib/Target/Sparc/SparcMCAsmInfo.cpp
@@ -22,6 +22,9 @@
   ZeroDirective = "\t.skip\t";
   CommentString = "!";
   COMMDirectiveTakesAlignment = true;
+  HasLEB128 = true;
+  AbsoluteDebugSectionOffsets = true;
+  SupportsDebugInformation = true;
   
   SunStyleELFSectionSwitchSyntax = true;
   UsesELFSectionDirectiveForBSS = true;

lib/Target/Sparc/SparcRegisterInfo.cpp

diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 2acce3d..a99592f 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -169,13 +169,11 @@
 }
 
 unsigned SparcRegisterInfo::getRARegister() const {
-  llvm_unreachable("What is the return address register");
-  return 0;
+  return SP::I7;
 }
 
 unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
-  llvm_unreachable("What is the frame register");
-  return SP::G1;
+  return SP::I6;
 }
 
 unsigned SparcRegisterInfo::getEHExceptionRegister() const {
@@ -189,8 +187,7 @@
 }
 
 int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
-  llvm_unreachable("What is the dwarf register number");
-  return -1;
+  return SparcGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
 }
 
 #include "SparcGenRegisterInfo.inc"