In the initial exec mode we always do a load to find the address of a variable.
Before this patch in pic 32 bit code we would add the global base register
and not load from that address. This is a really old bug, but before the
introduction of the tls attributes we would never select initial exec for
pic code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159409 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 1a60ce3..e6a0df7 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7451,11 +7451,11 @@
Offset = DAG.getNode(ISD::ADD, dl, PtrVT,
DAG.getNode(X86ISD::GlobalBaseReg, DebugLoc(), PtrVT),
Offset);
- } else {
- Offset = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Offset,
- MachinePointerInfo::getGOT(), false, false, false,
- 0);
}
+
+ Offset = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Offset,
+ MachinePointerInfo::getGOT(), false, false, false,
+ 0);
}
// The address of the thread local variable is the add of the thread
diff --git a/test/CodeGen/X86/tls-pie.ll b/test/CodeGen/X86/tls-pie.ll
index 5cb3866..8269c43 100644
--- a/test/CodeGen/X86/tls-pie.ll
+++ b/test/CodeGen/X86/tls-pie.ll
@@ -40,7 +40,8 @@
; X32-NEXT: popl %eax
; X32-NEXT: .Ltmp{{[0-9]+}}:
; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %eax
-; X32-NEXT: movl %gs:i2@GOTNTPOFF(%eax), %eax
+; X32-NEXT: movl i2@GOTNTPOFF(%eax), %eax
+; X32-NEXT: movl %gs:(%eax), %eax
; X32-NEXT: ret
; X64: f3:
; X64: movq i2@GOTTPOFF(%rip), %rax
@@ -56,11 +57,11 @@
; X32: f4:
; X32: calll .L{{[0-9]+}}$pb
; X32-NEXT: .L{{[0-9]+}}$pb:
-; X32-NEXT: popl %eax
+; X32-NEXT: popl %ecx
; X32-NEXT: .Ltmp{{[0-9]+}}:
-; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %eax
-; X32-NEXT: leal i2@GOTNTPOFF(%eax), %eax
-; X32-NEXT: addl %gs:0, %eax
+; X32-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp{{[0-9]+}}-.L{{[0-9]+}}$pb), %ecx
+; X32-NEXT: movl %gs:0, %eax
+; X32-NEXT: addl i2@GOTNTPOFF(%ecx), %eax
; X32-NEXT: ret
; X64: f4:
; X64: movq %fs:0, %rax