commit 94e509caeab08edb27849ea9be5dc80e74d95f38
author Chris Lattner <sabre@nondot.org> Fri Nov 10 23:58:45 2006 +0000
committer Chris Lattner <sabre@nondot.org> Fri Nov 10 23:58:45 2006 +0000
tree f53e17fee16db6c932fc82711106978860cdc4df
parent de2b6605ba42a3d7ccbe75e773a1f910884faa3a

implement preinc support for r+i loads on ppc64


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 91811a8..d3844f4 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -830,14 +830,29 @@
     
     unsigned Opcode;
     bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD;
-    assert(!isSExt || LoadedVT == MVT::i16 && "Invalid sext update load");
-    switch (LoadedVT) {
-    default: assert(0 && "Invalid PPC load type!");
-    case MVT::f64: Opcode = PPC::LFDU; break;
-    case MVT::f32: Opcode = PPC::LFSU; break;
-    case MVT::i32: Opcode = PPC::LWZU; break;
-    case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break;
-    case MVT::i8:  Opcode = PPC::LBZU; break;
+    if (LD->getValueType(0) != MVT::i64) {
+      // Handle PPC32 integer and normal FP loads.
+      assert(!isSExt || LoadedVT == MVT::i16 && "Invalid sext update load");
+      switch (LoadedVT) {
+      default: assert(0 && "Invalid PPC load type!");
+      case MVT::f64: Opcode = PPC::LFDU; break;
+      case MVT::f32: Opcode = PPC::LFSU; break;
+      case MVT::i32: Opcode = PPC::LWZU; break;
+      case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break;
+      case MVT::i1:
+      case MVT::i8:  Opcode = PPC::LBZU; break;
+      }
+    } else {
+      assert(LD->getValueType(0) == MVT::i64 && "Unknown load result type!");
+      assert(!isSExt || LoadedVT == MVT::i16 && "Invalid sext update load");
+      switch (LoadedVT) {
+      default: assert(0 && "Invalid PPC load type!");
+      case MVT::i64: Opcode = PPC::LDU; break;
+      case MVT::i32: Opcode = PPC::LWZU8; break;
+      case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break;
+      case MVT::i1:
+      case MVT::i8:  Opcode = PPC::LBZU8; break;
+      }
     }
     
     SDOperand Offset = LD->getOffset();