print target nodes nicely
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34369 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 9daf181..ca256de 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -307,7 +307,7 @@
cerr << "Register class of operand and regclass of use don't agree!\n";
#ifndef NDEBUG
cerr << "Operand = " << IIOpNum << "\n";
- cerr << "Op->Val = "; Op.Val->dump(0); cerr << "\n";
+ cerr << "Op->Val = "; Op.Val->dump(&DAG); cerr << "\n";
cerr << "MI = "; MI->print(cerr);
cerr << "VReg = " << VReg << "\n";
cerr << "VReg RegClass size = " << VRC->getSize()