Move ARM if-conversion before post-ra scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106355 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 06c893a..e69349d 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -27,11 +27,6 @@
cl::desc("Form IT blocks early before register allocation"),
cl::init(false));
-static cl::opt<bool>
-EarlyIfConvert("arm-early-if-convert", cl::Hidden,
- cl::desc("Run if-conversion before post-ra scheduling"),
- cl::init(false));
-
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT);
switch (TheTriple.getOS()) {
@@ -130,7 +125,7 @@
// proper scheduling.
PM.add(createARMExpandPseudoPass());
- if (EarlyIfConvert && OptLevel != CodeGenOpt::None) {
+ if (OptLevel != CodeGenOpt::None) {
if (!Subtarget.isThumb1Only())
PM.add(createIfConverterPass());
if (Subtarget.isThumb2())
@@ -142,16 +137,8 @@
bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
- if (!EarlyIfConvert && OptLevel != CodeGenOpt::None) {
- if (!Subtarget.isThumb1Only())
- PM.add(createIfConverterPass());
- }
-
- if (Subtarget.isThumb2()) {
- if (!EarlyIfConvert)
- PM.add(createThumb2ITBlockPass());
+ if (Subtarget.isThumb2())
PM.add(createThumb2SizeReductionPass());
- }
PM.add(createARMConstantIslandPass());
return true;