Add a new addressing mode for NEON load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 258adb5..1513690 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -76,9 +76,11 @@
SDValue &Offset, SDValue &Opc);
bool SelectAddrMode5(SDValue Op, SDValue N, SDValue &Base,
SDValue &Offset);
+ bool SelectAddrMode6(SDValue Op, SDValue N, SDValue &Addr, SDValue &Update,
+ SDValue &Opc);
bool SelectAddrModePC(SDValue Op, SDValue N, SDValue &Offset,
- SDValue &Label);
+ SDValue &Label);
bool SelectThumbAddrModeRR(SDValue Op, SDValue N, SDValue &Base,
SDValue &Offset);
@@ -105,7 +107,6 @@
bool SelectT2AddrModeSoReg(SDValue Op, SDValue N, SDValue &Base,
SDValue &OffReg, SDValue &ShImm);
-
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -415,6 +416,16 @@
return true;
}
+bool ARMDAGToDAGISel::SelectAddrMode6(SDValue Op, SDValue N,
+ SDValue &Addr, SDValue &Update,
+ SDValue &Opc) {
+ Addr = N;
+ // The optional writeback is handled in ARMLoadStoreOpt.
+ Update = CurDAG->getRegister(0, MVT::i32);
+ Opc = CurDAG->getTargetConstant(ARM_AM::getAM6Opc(false), MVT::i32);
+ return true;
+}
+
bool ARMDAGToDAGISel::SelectAddrModePC(SDValue Op, SDValue N,
SDValue &Offset, SDValue &Label) {
if (N.getOpcode() == ARMISD::PIC_ADD && N.hasOneUse()) {