commit 97c7fc351e4dd73041bc7e47c8a144216a50a648
author Evan Cheng <evan.cheng@apple.com> Thu Jan 26 09:53:06 2006 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Jan 26 09:53:06 2006 +0000
tree 058b2afbf458a63613f4a14107368640b541e0d0
parent b0636041c88d9e7d63bb8840df7eb18b96175f58

Added preliminary x86 subtarget support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86TargetMachine.cpp

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 2893e3d..3e501ff 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -26,7 +26,7 @@
 #include <iostream>
 using namespace llvm;
 
-X86VectorEnum llvm::X86Vector = NoSSE;
+X86VectorEnum llvm::X86Vector = AutoDetect;
 bool llvm::X86ScalarSSE = false;
 bool llvm::X86DAGIsel = false;
 
@@ -61,7 +61,7 @@
        clEnumValN(SSE2, "sse2", "  Enable SSE and SSE2 support"),
        clEnumValN(SSE3, "sse3", "  Enable SSE, SSE2, and SSE3 support"),
        clEnumValEnd),
-    cl::location(X86Vector), cl::init(NoSSE));
+    cl::location(X86Vector), cl::init(AutoDetect));
 
   // Register the target.
   RegisterTarget<X86TargetMachine> X("x86", "  IA-32 (Pentium and above)");
@@ -102,6 +102,16 @@
     FrameInfo(TargetFrameInfo::StackGrowsDown,
               Subtarget.getStackAlignment(), -4),
     JITInfo(*this) {
+  if (X86Vector == AutoDetect) {
+      X86Vector = NoSSE;
+    if (Subtarget.hasSSE())
+      X86Vector = SSE;
+    if (Subtarget.hasSSE2())
+      X86Vector = SSE2;
+    if (Subtarget.hasSSE3())
+      X86Vector = SSE3;
+  }
+
   // Scalar SSE FP requires at least SSE2
   X86ScalarSSE &= X86Vector >= SSE2;