| commit | 98330ff8e344d2e88c0a2166901d394e813e8162 | [log] [tgz] |
|---|---|---|
| author | Bob Wilson <bob.wilson@apple.com> | Sat Mar 20 06:05:13 2010 +0000 |
| committer | Bob Wilson <bob.wilson@apple.com> | Sat Mar 20 06:05:13 2010 +0000 |
| tree | c540e5f54587e0bc65cafff74db4f3bb82a08744 | |
| parent | 472fdf7090bb00af3a3f9dcbe22263120a527533 [diff] |
Fix a very bad typo. Since the register number was off by one, the ARM load/store optimizer would incorrectly think that registers D26 and D28 were consecutive and would generate a VLDM instruction to load them. The assembler was not convinced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99043 91177308-0d34-0410-b5e6-96231b3b80d8