Provide masked reg-imm 'or' and 'and'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75919 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 9b9eeb2..e4df02b 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -50,8 +50,14 @@
return "SystemZ DAG->DAG Pattern Instruction Selection";
}
+ /// getI16Imm - Return a target constant with the specified value, of type
+ /// i16.
+ inline SDValue getI16Imm(uint64_t Imm) {
+ return CurDAG->getTargetConstant(Imm, MVT::i16);
+ }
+
// Include the pieces autogenerated from the target description.
- #include "SystemZGenDAGISel.inc"
+ #include "SystemZGenDAGISel.inc"
private:
SDNode *Select(SDValue Op);