commit 98df506e712d51bf74ae526e2b6304bef9025a7e
author Chris Lattner <sabre@nondot.org> Sat Aug 21 20:00:36 2004 +0000
committer Chris Lattner <sabre@nondot.org> Sat Aug 21 20:00:36 2004 +0000
tree f98649fdc503cffd0d7c3b6ada9ed070f8d6359c
parent 8edcd8465361f3aa29082e1b1f2a1c88afc0836a

Make alignment be in bits, just like size is


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15969 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeGenTarget.cpp

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 49fd772..b9c7f51 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -133,7 +133,8 @@
 
 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
   SpillSize = R->getValueAsInt("Size");
-  SpillAlignment = R->getValueAsInt("Alignment");
+  // FIXME: should convert to bits in all targets.
+  SpillAlignment = R->getValueAsInt("Alignment")*8;
 
   if (CodeInit *CI = dynamic_cast<CodeInit*>(R->getValueInit("Methods")))
     MethodDefinitions = CI->getValue();

utils/TableGen/RegisterInfoEmitter.cpp

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 682404e..ef79c35 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -128,7 +128,7 @@
 
     OS << "  struct " << Name << "Class : public TargetRegisterClass {\n"
        << "    " << Name << "Class() : TargetRegisterClass("
-       << RC.SpillSize/8 << ", " << RC.SpillAlignment << ", " << Name << ", "
+       << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << Name << ", "
        << Name << " + " << RC.Elements.size() << ") {}\n"
        << RC.MethodDefinitions << "  } " << Name << "Instance;\n\n";
   }