Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55893 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/fast-isel-phys.ll b/test/CodeGen/X86/fast-isel-phys.ll
new file mode 100644
index 0000000..2601146
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-phys.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -fast-isel -march=x86
+
+define i8 @t2(i8 %a, i8 %c) nounwind {
+ %tmp = shl i8 %a, %c
+ ret i8 %tmp
+}
+
+define i8 @t1(i8 %a) nounwind {
+ %tmp = mul i8 %a, 17
+ ret i8 %tmp
+}