Implement MaskedValueIsZero for ANY_EXTEND nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index c861762..c79045b 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -154,6 +154,11 @@
case ISD::ZERO_EXTEND:
SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
return MaskedValueIsZero(Op.getOperand(0),Mask & (~0ULL >> (64-SrcBits)));
+ case ISD::ANY_EXTEND:
+ // If the mask only includes bits in the low part, recurse.
+ SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
+ if (Mask >> SrcBits) return false; // Use of unknown top bits.
+ return MaskedValueIsZero(Op.getOperand(0), Mask);
case ISD::AssertZext:
SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.