Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98465 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll
index 8ddc405..c7070f2 100644
--- a/test/CodeGen/X86/tailcall-largecode.ll
+++ b/test/CodeGen/X86/tailcall-largecode.ll
@@ -20,7 +20,7 @@
; CHECK: subq $8, %rsp
; Put the call target into R11, which won't be clobbered while restoring
; callee-saved registers and won't be used for passing arguments.
-; CHECK: movq %rdi, %r11
+; CHECK: movq %rdi, %rax
; Pass the stack argument.
; CHECK: movl $7, 16(%rsp)
; Pass the register arguments, in the right registers.
@@ -33,7 +33,7 @@
; Adjust the stack to "return".
; CHECK: addq $8, %rsp
; And tail-call to the target.
-; CHECK: jmpq *%r11 # TAILCALL
+; CHECK: jmpq *%rax # TAILCALL
%res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5,
i32 6, i32 7)
ret i32 %res
@@ -60,11 +60,11 @@
; the jmp instruction. Put it into R11, which won't be clobbered
; while restoring callee-saved registers and won't be used for passing
; arguments.
-; CHECK: movabsq $manyargs_callee, %r11
+; CHECK: movabsq $manyargs_callee, %rax
; Adjust the stack to "return".
; CHECK: addq $8, %rsp
; And tail-call to the target.
-; CHECK: jmpq *%r11 # TAILCALL
+; CHECK: jmpq *%rax # TAILCALL
%res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4,
i32 5, i32 6, i32 7)
ret i32 %res