commit 9b58f29ad0f5f3eb53d5303aec5ca81456c76209
author Craig Topper <craig.topper@gmail.com> Thu Apr 19 06:52:06 2012 +0000
committer Craig Topper <craig.topper@gmail.com> Thu Apr 19 06:52:06 2012 +0000
tree e2a5aa9589ef042cfe235f71cd27b3efcf63252f
parent fc728fbdc2631ce8f343cf9b7292d218fde7419f

Make fast isel use &XXXRegClass instead of XXXRegisterClass. Not a functional change since XXXRegisterClass is just a constant alias of &XXXRegClass, but should probably go away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155104 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/FastISelEmitter.cpp

diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp
index e8dad77..2bb351b 100644
--- a/utils/TableGen/FastISelEmitter.cpp
+++ b/utils/TableGen/FastISelEmitter.cpp
@@ -639,7 +639,7 @@
                 Operands.PrintManglingSuffix(OS, *Memo.PhysRegs,
                                              ImmediatePredicates, true);
                 OS << "(" << InstNS << Memo.Name << ", ";
-                OS << InstNS << Memo.RC->getName() << "RegisterClass";
+                OS << "&" << InstNS << Memo.RC->getName() << "RegClass";
                 if (!Operands.empty())
                   OS << ", ";
                 Operands.PrintArguments(OS, *Memo.PhysRegs);
@@ -731,7 +731,7 @@
               Operands.PrintManglingSuffix(OS, *Memo.PhysRegs,
                                            ImmediatePredicates, true);
               OS << "(" << InstNS << Memo.Name << ", ";
-              OS << InstNS << Memo.RC->getName() << "RegisterClass";
+              OS << "&" << InstNS << Memo.RC->getName() << "RegClass";
               if (!Operands.empty())
                 OS << ", ";
               Operands.PrintArguments(OS, *Memo.PhysRegs);