commit 9bce0f92c3f1be7ad738ed018c7dd4f4c4bd979a
author Chris Lattner <sabre@nondot.org> Thu May 12 02:06:00 2005 +0000
committer Chris Lattner <sabre@nondot.org> Thu May 12 02:06:00 2005 +0000
tree 1f28e216d9be2bb94944c48b68cec3b29207a827
parent 39d7f8f3383552868b3ea2f3fa8cabca78decfbd

These targets don't like setcc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21884 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC64ISelPattern.cpp

diff --git a/lib/Target/PowerPC/PPC64ISelPattern.cpp b/lib/Target/PowerPC/PPC64ISelPattern.cpp
index 54f540f..a654adc 100644
--- a/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -41,6 +41,9 @@
     int ReturnAddrIndex;              // FrameIndex for return slot.
   public:
     PPC64TargetLowering(TargetMachine &TM) : TargetLowering(TM) {
+      // Fold away setcc operations if possible.
+      setSetCCIsExpensive();
+
       // Set up the register classes.
       addRegisterClass(MVT::i64, PPC64::GPRCRegisterClass);
       addRegisterClass(MVT::f32, PPC64::FPRCRegisterClass);