commit 9bed0f58eb7f5e9e22d062f3880a5fabfdd0dfdd
author Duncan Sands <baldrick@free.fr> Fri Jul 11 16:57:02 2008 +0000
committer Duncan Sands <baldrick@free.fr> Fri Jul 11 16:57:02 2008 +0000
tree ec7f749bd53580e9d775751bdd16c59e8b8b33ad
parent edfba7e707a4f2f2e800843a7ef980c27d7f4eff

Add two missing SINT_TO_FP libcalls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 4e3e217..20cfc77 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1771,11 +1771,12 @@
 }
 
 SDOperand DAGTypeLegalizer::ExpandIntOp_SINT_TO_FP(SDOperand Source,
-                                                     MVT DestTy) {
+                                                   MVT DestTy) {
   // We know the destination is legal, but that the input needs to be expanded.
   MVT SourceVT = Source.getValueType();
 
   // Check to see if the target has a custom way to lower this.  If so, use it.
+  // This can trigger when called from ExpandIntOp_UINT_TO_FP.
   switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
   default: assert(0 && "This action not implemented for this operation!");
   case TargetLowering::Legal:
@@ -1789,13 +1790,24 @@
   }
 
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  if (SourceVT == MVT::i64) {
+  if (SourceVT == MVT::i32) {
+    if (DestTy == MVT::f32)
+      LC = RTLIB::SINTTOFP_I32_F32;
+    else if (DestTy == MVT::f64)
+      LC = RTLIB::SINTTOFP_I32_F64;
+    else if (DestTy == MVT::f80)
+      LC = RTLIB::SINTTOFP_I32_F80;
+    else if (DestTy == MVT::ppcf128)
+      LC = RTLIB::SINTTOFP_I32_PPCF128;
+  } else if (SourceVT == MVT::i64) {
     if (DestTy == MVT::f32)
       LC = RTLIB::SINTTOFP_I64_F32;
-    else {
-      assert(DestTy == MVT::f64 && "Unknown fp value type!");
+    else if (DestTy == MVT::f64)
       LC = RTLIB::SINTTOFP_I64_F64;
-    }
+    else if (DestTy == MVT::f80)
+      LC = RTLIB::SINTTOFP_I64_F80;
+    else if (DestTy == MVT::ppcf128)
+      LC = RTLIB::SINTTOFP_I64_PPCF128;
   } else if (SourceVT == MVT::i128) {
     if (DestTy == MVT::f32)
       LC = RTLIB::SINTTOFP_I128_F32;
@@ -1803,16 +1815,12 @@
       LC = RTLIB::SINTTOFP_I128_F64;
     else if (DestTy == MVT::f80)
       LC = RTLIB::SINTTOFP_I128_F80;
-    else {
-      assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
+    else if (DestTy == MVT::ppcf128)
       LC = RTLIB::SINTTOFP_I128_PPCF128;
-    }
-  } else {
-    assert(0 && "Unknown int value type!");
   }
-
   assert(LC != RTLIB::UNKNOWN_LIBCALL &&
          "Don't know how to expand this SINT_TO_FP!");
+
   return MakeLibCall(LC, DestTy, &Source, 1, true);
 }
 

lib/CodeGen/SelectionDAG/TargetLowering.cpp

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 4a2a0c0..b196868 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -123,6 +123,8 @@
   Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
   Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
   Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
+  Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
+  Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
   Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
   Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
   Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";