commit 9d24dc7472df0ac5c3c516987979058673ef02f6
author Dan Gohman <gohman@apple.com> Thu Mar 13 22:13:53 2008 +0000
committer Dan Gohman <gohman@apple.com> Thu Mar 13 22:13:53 2008 +0000
tree 326eae0ffb420bcc79c8b493fc353e67c30b3d65
parent 78a334f549e9f671d5abcaf0bae5ba5311a31f92

More APInt-ification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 2e82b36..27a017a 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4849,7 +4849,7 @@
       // X > -1,  x < 0
       if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(RHS))
         if ((cast<CondCodeSDNode>(CC)->get() == ISD::SETLT && 
-             CST->getValue() == 0) ||             // X < 0
+             CST->isNullValue()) ||               // X < 0
             (cast<CondCodeSDNode>(CC)->get() == ISD::SETGT &&
              CST->isAllOnesValue())) {            // X > -1
           Tmp1 = LHSHi;
@@ -4890,11 +4890,11 @@
       
       ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.Val);
       ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.Val);
-      if ((Tmp1C && Tmp1C->getValue() == 0) ||
-          (Tmp2C && Tmp2C->getValue() == 0 &&
+      if ((Tmp1C && Tmp1C->isNullValue()) ||
+          (Tmp2C && Tmp2C->isNullValue() &&
            (CCCode == ISD::SETLE || CCCode == ISD::SETGE ||
             CCCode == ISD::SETUGE || CCCode == ISD::SETULE)) ||
-          (Tmp2C && Tmp2C->getValue() == 1 &&
+          (Tmp2C && Tmp2C->getAPIntValue() == 1 &&
            (CCCode == ISD::SETLT || CCCode == ISD::SETGT ||
             CCCode == ISD::SETUGT || CCCode == ISD::SETULT))) {
         // low part is known false, returns high part.
@@ -6321,7 +6321,7 @@
     // If ADDC/ADDE are supported and if the shift amount is a constant 1, emit 
     // this X << 1 as X+X.
     if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(ShiftAmt)) {
-      if (ShAmt->getValue() == 1 && TLI.isOperationLegal(ISD::ADDC, NVT) && 
+      if (ShAmt->getAPIntValue() == 1 && TLI.isOperationLegal(ISD::ADDC, NVT) && 
           TLI.isOperationLegal(ISD::ADDE, NVT)) {
         SDOperand LoOps[2], HiOps[3];
         ExpandOp(Node->getOperand(0), LoOps[0], HiOps[0]);