Special epilogue for vararg functions. We cannot do a pop to pc because
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33739 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 5fbd412..416d430 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -165,8 +165,11 @@
// Control Flow Instructions.
//
-let isReturn = 1, isTerminator = 1 in
+let isReturn = 1, isTerminator = 1 in {
def tBX_RET : TI<(ops), "bx lr", [(ARMretflag)]>;
+ // Alternative return instruction used by vararg functions.
+ def tBX_RET_vararg : TI<(ops GPR:$dst), "bx $dst", []>;
+}
// FIXME: remove when we have a way to marking a MI with these properties.
let isLoad = 1, isReturn = 1, isTerminator = 1 in