initial implementation of intrinsic parsing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26495 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 366af85..4c8b3a0 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -25,6 +25,7 @@
#include "AsmWriterEmitter.h"
#include "DAGISelEmitter.h"
#include "SubtargetEmitter.h"
+#include "IntrinsicEmitter.h"
#include <algorithm>
#include <cstdio>
#include <fstream>
@@ -38,6 +39,7 @@
GenInstrEnums, GenInstrs, GenAsmWriter,
GenDAGISel,
GenSubtarget,
+ GenIntrinsic,
PrintEnums,
Parse
};
@@ -65,6 +67,8 @@
"Generate a DAG instruction selector"),
clEnumValN(GenSubtarget, "gen-subtarget",
"Generate subtarget enumerations"),
+ clEnumValN(GenIntrinsic, "gen-intrinsic",
+ "Generate intrinsic information"),
clEnumValN(PrintEnums, "print-enums",
"Print enum values for a class"),
clEnumValN(Parse, "parse",
@@ -474,6 +478,9 @@
case GenSubtarget:
SubtargetEmitter(Records).run(*Out);
break;
+ case GenIntrinsic:
+ IntrinsicEmitter(Records).run(*Out);
+ break;
case PrintEnums:
{
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);