Pattern-match return. Includes gross hack!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24874 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ba3fa0e..0e5000e 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -793,15 +793,26 @@
SDOperand PPCTargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
SelectionDAG &DAG) {
- if (Op.getValueType() == MVT::i64) {
- SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
- DAG.getConstant(1, MVT::i32));
- SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
- DAG.getConstant(0, MVT::i32));
- return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
- } else {
- return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
+ SDOperand Copy;
+ switch (Op.getValueType()) {
+ default: assert(0 && "Unknown type to return!");
+ case MVT::i32:
+ Copy = DAG.getCopyToReg(Chain, PPC::R3, Op, SDOperand());
+ break;
+ case MVT::f32:
+ case MVT::f64:
+ Copy = DAG.getCopyToReg(Chain, PPC::F1, Op, SDOperand());
+ break;
+ case MVT::i64:
+ SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+ DAG.getConstant(1, MVT::i32));
+ SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+ DAG.getConstant(0, MVT::i32));
+ Copy = DAG.getCopyToReg(Chain, PPC::R3, Hi, SDOperand());
+ Copy = DAG.getCopyToReg(Copy, PPC::R4, Lo, Copy.getValue(1));
+ break;
}
+ return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
}
SDOperand PPCTargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,