commit 9f8fd6d9ea4ae50587cd1c1f088e24dea37e9ca7
author Chris Lattner <sabre@nondot.org> Mon Feb 02 19:31:38 2004 +0000
committer Chris Lattner <sabre@nondot.org> Mon Feb 02 19:31:38 2004 +0000
tree 67fb8b6100b734834be33317edd28a6e9c1a520d
parent 4a06f354843117df344d7b0aacc7114d50d38fe9

Generate the fchs instruction to negate a floating point number


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11078 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/InstSelectSimple.cpp

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index fd4c44f..abfcad1 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -1227,7 +1227,13 @@
           return;
         }
       }
-    }
+    } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
+      if (CFP->isExactlyValue(-0.0)) {
+        // -0.0 - X === -X
+        unsigned op1Reg = getReg(Op1, MBB, IP);
+        BMI(MBB, IP, X86::FCHS, 1, DestReg).addReg(op1Reg);
+        return;
+      }
 
   if (!isa<ConstantInt>(Op1) || Class == cLong) {
     static const unsigned OpcodeTab[][4] = {