R600/SI: fix inserting waits for unordered defines
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176342 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/R600/SIInsertWaits.cpp b/lib/Target/R600/SIInsertWaits.cpp
index 24fc929..67fbdf7 100644
--- a/lib/Target/R600/SIInsertWaits.cpp
+++ b/lib/Target/R600/SIInsertWaits.cpp
@@ -88,6 +88,9 @@
MachineBasicBlock::iterator I,
const Counters &Counts);
+ /// \brief Do we need def2def checks?
+ bool unorderedDefines(MachineInstr &MI);
+
/// \brief Resolve all operand dependencies to counter requirements
Counters handleOperands(MachineInstr &MI);
@@ -125,7 +128,7 @@
// Only consider stores or EXP for EXP_CNT
Result.Named.EXP = !!(TSFlags & SIInstrFlags::EXP_CNT &&
- (MI.getOpcode() == AMDGPU::EXP || !MI.getDesc().mayStore()));
+ (MI.getOpcode() == AMDGPU::EXP || MI.getDesc().mayStore()));
// LGKM may uses larger values
if (TSFlags & SIInstrFlags::LGKM_CNT) {
@@ -299,8 +302,21 @@
Dst.Array[i] = std::max(Dst.Array[i], Src.Array[i]);
}
+bool SIInsertWaits::unorderedDefines(MachineInstr &MI) {
+
+ uint64_t TSFlags = TII->get(MI.getOpcode()).TSFlags;
+ if (TSFlags & SIInstrFlags::LGKM_CNT)
+ return true;
+
+ if (TSFlags & SIInstrFlags::EXP_CNT)
+ return ExpInstrTypesSeen == 3;
+
+ return false;
+}
+
Counters SIInsertWaits::handleOperands(MachineInstr &MI) {
+ bool UnorderedDefines = unorderedDefines(MI);
Counters Result = ZeroCounts;
// For each register affected by this
@@ -311,8 +327,11 @@
RegInterval Interval = getRegInterval(Op);
for (unsigned j = Interval.first; j < Interval.second; ++j) {
- if (Op.isDef())
+ if (Op.isDef()) {
increaseCounters(Result, UsedRegs[j]);
+ if (UnorderedDefines)
+ increaseCounters(Result, DefinedRegs[j]);
+ }
if (Op.isUse())
increaseCounters(Result, DefinedRegs[j]);