Do not generate a FP_ROUND of f64 to f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46195 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 8d7c85c..222a23d 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3608,10 +3608,11 @@
MVT::ValueType SrcVT = Op.getOperand(0).getValueType();
if (TLI.getConvertAction(SrcVT, DstVT) == TargetLowering::Expand) {
if (SrcVT == MVT::ppcf128) {
- SDOperand Lo, Hi;
- ExpandOp(Node->getOperand(0), Lo, Hi);
+ SDOperand Lo;
+ ExpandOp(Node->getOperand(0), Lo, Result);
// Round it the rest of the way (e.g. to f32) if needed.
- Result = DAG.getNode(ISD::FP_ROUND, DstVT, Hi, Op.getOperand(1));
+ if (DstVT!=MVT::f64)
+ Result = DAG.getNode(ISD::FP_ROUND, DstVT, Result, Op.getOperand(1));
break;
}
// The only other way we can lower this is to turn it into a STORE,