Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8,
while the decision is to bit-pack small values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140601 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index f201227..1337ef2 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1180,10 +1180,6 @@
// bytes. For example, promote EXTLOAD:i20 -> EXTLOAD:i24.
unsigned NewWidth = SrcVT.getStoreSizeInBits();
EVT NVT = EVT::getIntegerVT(*DAG.getContext(), NewWidth);
- if (SrcVT.isVector()) {
- NVT = EVT::getVectorVT(*DAG.getContext(), NVT,
- SrcVT.getVectorNumElements());
- }
SDValue Ch;
// The extra bits are guaranteed to be zero, since we stored them that
@@ -1525,12 +1521,7 @@
// TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1)
EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
StVT.getStoreSizeInBits());
- if (StVT.isVector()) {
- NVT = EVT::getVectorVT(*DAG.getContext(), NVT,
- StVT.getVectorNumElements());
- }
-
- Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT.getScalarType());
+ Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT);
Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
NVT, isVolatile, isNonTemporal, Alignment);
} else if (StWidth & (StWidth - 1)) {