commit a210db781f17b5ab8e2b71d53276153a9d15eead
author Silviu Baranga <silviu.baranga@arm.com> Wed Mar 27 12:38:44 2013 +0000
committer Silviu Baranga <silviu.baranga@arm.com> Wed Mar 27 12:38:44 2013 +0000
tree c86702560e31e81e948c5014c6370be78c191deb
parent 0f680703ebb1352cccbcec8ada1e0ae7fbc26d3c

Enabling the generation of dependency breakers for partial updates on Cortex-A15. Also fixing a small bug in getting the update clearence for VLD1LNd32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178134 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMTargetMachine.cpp

diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index b0f9e56..42c7d2c 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -185,8 +185,7 @@
       addPass(createARMLoadStoreOptimizationPass());
       printAndVerify("After ARM load / store optimizer");
     }
-    if ((DisableA15SDOptimization || !getARMSubtarget().isCortexA15()) &&
-      getARMSubtarget().hasNEON())
+    if (getARMSubtarget().hasNEON())
       addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
   }