Remove separate vector of implicit refs from MachineInstr, and
instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4399 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 2d2487e..91b5ce7 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -19,24 +19,33 @@
 // Constructor for instructions with fixed #operands (nearly all)
 MachineInstr::MachineInstr(MachineOpCode _opCode)
   : opCode(_opCode),
-    operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()) {
+    operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
+    numImplicitRefs(0)
+{
   assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
 }
 
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
-  : opCode(OpCode), operands(numOperands, MachineOperand()) {
+  : opCode(OpCode),
+    operands(numOperands, MachineOperand()),
+    numImplicitRefs(0)
+{
 }
 
 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
-                           bool XX, bool YY) : opCode(Opcode) {
+                           bool XX, bool YY)
+  : opCode(Opcode),
+    numImplicitRefs(0)
+{
   operands.reserve(numOperands);
 }
 
 // OperandComplete - Return true if it's illegal to add a new operand
-bool MachineInstr::OperandsComplete() const {
+bool MachineInstr::OperandsComplete() const
+{
   int NumOperands = TargetInstrDescriptors[opCode].numOperands;
-  if (NumOperands >= 0 && operands.size() >= (unsigned)NumOperands)
+  if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
     return true;  // Broken!
   return false;
 }
@@ -47,7 +56,10 @@
 // This only resets the size of the operand vector and initializes it.
 // The new operands must be set explicitly later.
 // 
-void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands) {
+void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
+{
+  assert(getNumImplicitRefs() == 0 &&
+         "This is probably broken because implicit refs are going to be lost.");
   opCode = Opcode;
   operands.clear();
   operands.resize(numOperands, MachineOperand());
@@ -60,7 +72,7 @@
                                    bool isdef,
                                    bool isDefAndUse)
 {
-  assert(i < operands.size());
+  assert(i < operands.size());          // may be explicit or implicit op
   operands[i].opType = opType;
   operands[i].value = V;
   operands[i].regNum = -1;
@@ -77,7 +89,7 @@
 				MachineOperand::MachineOperandType operandType,
                                      int64_t intValue)
 {
-  assert(i < operands.size());
+  assert(i < getNumOperands());          // must be explicit op
   assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
          "immed. constant cannot be defined");
 
@@ -92,7 +104,7 @@
 MachineInstr::SetMachineOperandReg(unsigned i,
                                    int regNum,
                                    bool isdef) {
-  assert(i < operands.size());
+  assert(i < getNumOperands());          // must be explicit op
 
   operands[i].opType = MachineOperand::MO_MachineRegister;
   operands[i].value = NULL;
@@ -107,6 +119,7 @@
 void
 MachineInstr::SetRegForOperand(unsigned i, int regNum)
 {
+  assert(i < getNumOperands());          // must be explicit op
   operands[i].setRegForValue(regNum);
   insertUsedReg(regNum);
 }
@@ -129,11 +142,11 @@
         }
 
   // Subsitute implicit refs
-  for (unsigned i=0, N=implicitRefs.size(); i < N; ++i)
+  for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
     if (getImplicitRef(i) == oldVal)
       if (!defsOnly || implicitRefIsDefined(i))
         {
-          implicitRefs[i].Val = newVal;
+          getImplicitOp(i).value = newVal;
           ++numSubst;
         }