First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index efd64e0..47d7625 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -21,6 +21,7 @@
#include "X86.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
+#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@@ -35,21 +36,22 @@
STATISTIC(NumEmitted, "Number of machine instructions emitted");
namespace {
+template< class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass {
const X86InstrInfo *II;
const TargetData *TD;
X86TargetMachine &TM;
- MachineCodeEmitter &MCE;
+ machineCodeEmitter &MCE;
intptr_t PICBaseOffset;
bool Is64BitMode;
bool IsPIC;
public:
static char ID;
- explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
+ explicit Emitter(X86TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(false),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
- Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
+ Emitter(X86TargetMachine &tm, machineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
: MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
@@ -96,17 +98,31 @@
bool gvNeedsNonLazyPtr(const GlobalValue *GV);
};
- char Emitter::ID = 0;
+
+template< class machineCodeEmitter>
+ char Emitter<machineCodeEmitter>::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
-/// to the specified MCE object.
-FunctionPass *llvm::createX86CodeEmitterPass(X86TargetMachine &TM,
- MachineCodeEmitter &MCE) {
- return new Emitter(TM, MCE);
+/// to the specified templated MachineCodeEmitter object.
+
+namespace llvm {
+
+FunctionPass *createX86CodeEmitterPass(
+ X86TargetMachine &TM, MachineCodeEmitter &MCE)
+{
+ return new Emitter<MachineCodeEmitter>(TM, MCE);
+}
+FunctionPass *createX86JITCodeEmitterPass(
+ X86TargetMachine &TM, JITCodeEmitter &JCE)
+{
+ return new Emitter<JITCodeEmitter>(TM, JCE);
}
-bool Emitter::runOnMachineFunction(MachineFunction &MF) {
+} // end namespace llvm
+
+template< class machineCodeEmitter>
+bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
@@ -140,7 +156,8 @@
/// necessary to resolve the address of this block later and emits a dummy
/// value.
///
-void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
// Remember where this reference was and where it is to so we can
// deal with it later.
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
@@ -151,7 +168,8 @@
/// emitGlobalAddress - Emit the specified address to the code stream assuming
/// this is part of a "take the address of a global" instruction.
///
-void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */,
bool NeedStub /* = false */,
@@ -177,7 +195,8 @@
/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0;
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, ES, RelocCST));
@@ -190,7 +209,8 @@
/// emitConstPoolAddress - Arrange for the address of an constant pool
/// to be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
@@ -210,7 +230,8 @@
/// emitJumpTableAddress - Arrange for the address of a jump table to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
if (Reloc == X86::reloc_picrel_word)
@@ -226,7 +247,8 @@
MCE.emitWordLE(0);
}
-unsigned Emitter::getX86RegNum(unsigned RegNo) const {
+template< class machineCodeEmitter>
+unsigned Emitter<machineCodeEmitter>::getX86RegNum(unsigned RegNo) const {
return II->getRegisterInfo().getX86RegNum(RegNo);
}
@@ -236,20 +258,24 @@
return RM | (RegOpcode << 3) | (Mod << 6);
}
-void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
}
-void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned RegOpcodeFld) {
MCE.emitByte(ModRMByte(3, RegOpcodeFld, 0));
}
-void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
// SIB byte is in the same format as the ModRMByte...
MCE.emitByte(ModRMByte(SS, Index, Base));
}
-void Emitter::emitConstant(uint64_t Val, unsigned Size) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitConstant(uint64_t Val, unsigned Size) {
// Output the constant in little endian byte order...
for (unsigned i = 0; i != Size; ++i) {
MCE.emitByte(Val & 255);
@@ -263,14 +289,16 @@
return Value == (signed char)Value;
}
-bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
+template< class machineCodeEmitter>
+bool Emitter<machineCodeEmitter>::gvNeedsNonLazyPtr(const GlobalValue *GV) {
// For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
// mechanism as 32-bit mode.
return (!Is64BitMode || TM.getSubtarget<X86Subtarget>().isTargetDarwin()) &&
TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
-void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
int DispVal, intptr_t PCAdj) {
// If this is a simple integer displacement that doesn't require a relocation,
// emit it now.
@@ -304,7 +332,8 @@
}
}
-void Emitter::emitMemModRMByte(const MachineInstr &MI,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
unsigned Op, unsigned RegOpcodeField,
intptr_t PCAdj) {
const MachineOperand &Op3 = MI.getOperand(Op+3);
@@ -421,7 +450,9 @@
}
}
-void Emitter::emitInstruction(const MachineInstr &MI,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitInstruction(
+ const MachineInstr &MI,
const TargetInstrDesc *Desc) {
DOUT << MI;
@@ -773,3 +804,4 @@
abort();
}
}
+