My last coalescer fix introduced a subtler one. It's aborting a commuting optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66715 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index c29ee62..277b1e6 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -400,9 +400,6 @@
const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx);
BHasPHIKill |= DLR->valno->hasPHIKill;
assert(DLR->valno->def == DefIdx);
- if (BHasSubRegs)
- // Don't know how to update sub-register live intervals.
- return false;
BDeadValNos.push_back(DLR->valno);
BExtend[DLR->start] = DLR->end;
JoinedCopies.insert(UseMI);
@@ -418,8 +415,17 @@
DOUT << "\nExtending: "; IntB.print(DOUT, tri_);
// Remove val#'s defined by copies that will be coalesced away.
- for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i)
+ for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i) {
+ VNInfo *DeadVNI = BDeadValNos[i];
+ if (BHasSubRegs) {
+ for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) {
+ LiveInterval &SRLI = li_->getInterval(*SR);
+ const LiveRange *SRLR = SRLI.getLiveRangeContaining(DeadVNI->def);
+ SRLI.removeValNo(SRLR->valno);
+ }
+ }
IntB.removeValNo(BDeadValNos[i]);
+ }
// Extend BValNo by merging in IntA live ranges of AValNo. Val# definition
// is updated. Kills are also updated.
@@ -443,7 +449,7 @@
// If the IntB live range is assigned to a physical register, and if that
// physreg has sub-registers, update their live intervals as well.
- if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
+ if (BHasSubRegs) {
for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) {
LiveInterval &SRLI = li_->getInterval(*SR);
SRLI.MergeInClobberRange(AI->start, End, li_->getVNInfoAllocator());