correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91313 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 0f2024f..a2aa1c0 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -1073,14 +1073,16 @@
def t2Int_MemBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",
- [(ARMMemBarrier)]> {
+ [(ARMMemBarrier)]>,
+ Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DMB
}
def t2Int_SyncBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dsb", "",
- [(ARMSyncBarrier)]> {
+ [(ARMSyncBarrier)]>,
+ Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DSB
}
}